參數(shù)資料
型號(hào): M27C64A-20F1TR
廠商: 意法半導(dǎo)體
英文描述: 3.3-V 12-Bit Universal Bus Driver with Parity Checker and Dual 3-State Outputs 56-TSSOP -40 to 85
中文描述: 64千位× 8紫外線8KB的EPROM的和OTP存儲(chǔ)器
文件頁(yè)數(shù): 5/12頁(yè)
文件大?。?/td> 105K
代理商: M27C64A-20F1TR
AI00826
2.4V
0.4V
2.0V
0.8V
Figure 3. AC Testing Input Output Waveforms
Input Rise and Fall Times
20ns
Input Pulse Voltages
0.4V to 2.4V
Input and Output Timing Ref.
Voltages
0.8V to 2.0V
AC MEASUREMENT CONDITIONS
AI00828
1.3V
OUT
CL = 100pF
CL includes JIG capacitance
3.3k
1N914
DEVICE
UNDER
TEST
Figure 4. AC Testing Load Circuit
Note that Output Hi-Z is defined as the point where data
is no longer driven.
Symbol
Parameter
Test Condition
Min
Max
Unit
C
IN
Input Capacitance
V
IN
= 0V
6
pF
C
OUT
Output Capacitance
V
OUT
= 0V
12
pF
Note:
1. Sampled only, not 100% tested.
Table 5. Capacitance
(1)
(T
A
= 25
°
C, f = 1 MHz )
AI00778B
tAXQX
tEHQZ
A0-A12
E
G
Q0-Q7
tAVQV
tGHQZ
tGLQV
tELQV
VALID
Hi-Z
VALID
Figure 5. Read Mode AC Waveforms
5/12
M27C64A
相關(guān)PDF資料
PDF描述
M27C64A-20F1X 3.3-V 12-Bit Universal Bus Driver with Parity Checker and Dual 3-State Outputs 56-TVSOP -40 to 85
M27C64A-20F6TR 3.3-V 12-Bit Universal Bus Driver with Parity Checker and Dual 3-State Outputs 56-SSOP -40 to 85
M27C64A-20F6X 3.3-V 12-Bit Universal Bus Driver with Parity Checker and Dual 3-State Outputs 56-TSSOP -40 to 85
M27C64A-30F6X Octal Buffer/Driver With 3-State Outputs 20-SOIC -40 to 85
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