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參數(shù)資料
| 型號： | M27C64A-15C6TR |
| 廠商： | 意法半導(dǎo)體 |
| 英文描述： | 64 Kbit 8Kb x 8 UV EPROM and OTP EPROM |
| 中文描述： | 64千位× 8紫外線8KB的EPROM的和OTP存儲器 |
| 文件頁數(shù)： | 7/12頁 |
| 文件大?。?/td> | 105K |
| 代理商： | M27C64A-15C6TR |
Symbol
Parameter
Test Condition
Min
Max
Unit
I
LI
Input Leakage Current
V
IL
≤
V
IN
≤
V
IH
±
10
μ
A
I
CC
Supply Current
30
mA
I
PP
Program Current
E = V
IL
30
mA
V
IL
Input Low Voltage
–0.3
0.8
V
V
IH
Input High Voltage
2
V
CC
+ 0.5
V
V
OL
Output Low Voltage
I
OL
= 2.1mA
0.4
V
V
OH
Output High Voltage TTL
I
OH
= –400
μ
A
2.4
V
V
ID
A9 Voltage
11.5
12.5
V
Note:
1. V
CC
must be applied simultaneously with or before V
PP
and removed simultaneously or after V
PP
.
Table 8. Programming Mode DC Characteristics
(1)
(T
A
= 25
°
C; V
CC
= 6V
±
0.25V; V
PP
= 12.5V
±
0.25V)
Symbol
Alt
Parameter
Test Condition
Min
Max
Unit
t
AVPL
t
AS
Address Valid to Program Low
2
μ
s
t
QVPL
t
DS
Input Valid to Program Low
2
μ
s
t
VPHPL
t
VPS
V
PP
High to Program Low
2
μ
s
t
VCHPL
t
VCS
V
CC
High to Program Low
2
μ
s
t
ELPL
t
CES
Chip Enable Low to
Program Low
2
μ
s
t
PLPH
t
PW
Program Pulse Width (Initial)
0.95
1.05
ms
Program Pulse Width (Over
Program)
2.85
78.75
ms
t
PHQX
t
DH
Program High to Input
Transition
2
μ
s
t
QXGL
t
OES
Input Transition to Output
Enable Low
2
μ
s
t
GLQV
t
OE
Output Enable Low to
Output Valid
100
ns
t
GHQZ
(2)
t
DFP
Output Enable High to
Output Hi-Z
0
130
ns
t
GHAX
t
AH
Output Enable High to
Address Transition
0
ns
Notes:
1. V
must be applied simultaneously with or before V
PP
and removed simultaneously or after V
PP.
2. Sampled only, not 100% tested.
Table 9. Programming Mode AC Characteristics
(1)
(T
A
= 25
°
C; V
CC
= 6V
±
0.25V; V
PP
= 12.5V
±
0.25V)
7/12
M27C64A
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| M27C64A-15C6X | 64 Kbit 8Kb x 8 UV EPROM and OTP EPROM |
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