參數(shù)資料
型號: M25PE80-VMP6TG
廠商: 意法半導(dǎo)體
元件分類: DRAM
英文描述: 4 Mbit Uniform Sector, Serial Flash Memory
中文描述: 4兆位統(tǒng)一部門,串行閃存
文件頁數(shù): 15/43頁
文件大?。?/td> 599K
代理商: M25PE80-VMP6TG
15/43
M25PE80
Write Enable (WREN)
The Write Enable (WREN) instruction (
Figure 8.
)
sets the Write Enable Latch (WEL) bit.
The Write Enable Latch (WEL) bit must be set pri-
or to every Page Write (PW), Page Program (PP),
Page Erase (PE), Sector Erase (SE), Bulk Erase
(BE) and Write to Lock Register (WRLR) instruc-
tions.
The Write Enable (WREN) instruction is entered
by driving Chip Select (S) Low, sending the in-
struction code, and then driving Chip Select (S)
High.
Figure 8. Write Enable (WREN) Instruction Sequence
Write Disable (WRDI)
The Write Disable (WRDI) instruction (
Figure 9.
)
resets the Write Enable Latch (WEL) bit.
The Write Disable (WRDI) instruction is entered by
driving Chip Select (S) Low, sending the instruc-
tion code, and then driving Chip Select (S) High.
The Write Enable Latch (WEL) bit is reset under
the following conditions:
Power-up
Write Disable (WRDI) instruction completion
Page Write (PW) instruction completion
Page Program (PP) instruction completion
Write to Lock Register (WRLR) instruction
completion
Page Erase (PE) instruction completion
Sector Erase (SE) instruction completion
Bulk Erase (BE) instruction completion
Figure 9. Write Disable (WRDI) Instruction Sequence
C
D
AI02281E
S
Q
2
1
3
4
5
6
7
High Impedance
0
Instruction
C
D
AI03750D
S
Q
2
1
3
4
5
6
7
High Impedance
0
Instruction
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