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參數(shù)資料
| 型號： | M25P40-VMN3TG |
| 廠商： | 意法半導體 |
| 元件分類： | DRAM |
| 英文描述： | 4 Mbit Uniform Sector, Serial Flash Memory |
| 中文描述： | 4兆位統(tǒng)一部門，串行閃存 |
| 文件頁數(shù)： | 9/40頁 |
| 文件大?。?/td> | 232K |
| 代理商： | M25P40-VMN3TG |
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9/40
M25P40
Protection Modes
The environments where non-volatile memory de-
vices are used can be very noisy. No SPI device
can operate correctly in the presence of excessive
noise. To help combat this, the M25P40 boasts the
following data protection mechanisms:
Power-On Reset and an internal timer (t
PUW
)
can provide protection against inadvertant
changes while the power supply is outside the
operating specification.
Program, Erase and Write Status Register
instructions are checked that they consist of a
number of clock pulses that is a multiple of
eight, before they are accepted for execution.
All instructions that modify data must be
preceded by a Write Enable (WREN)
instruction to set the Write Enable Latch
(WEL) bit . This bit is returned to its reset state
by the following events:
–
Power-up
–
Write Disable (WRDI) instruction
completion
■
■
■
–
Write Status Register (WRSR) instruction
completion
Page Program (PP) instruction completion
Sector Erase (SE) instruction completion
Bulk Erase (BE) instruction completion
The Block Protect (BP2, BP1, BP0) bits allow
part of the memory to be configured as read-
only. This is the Software Protected Mode
(SPM).
The Write Protect (W) signal allows the Block
Protect (BP2, BP1, BP0) bits and Status
Register Write Disable (SRWD) bit to be
protected. This is the Hardware Protected
Mode (HPM).
In addition to the low power consumption
feature, the Deep Power-down mode offers
extra software protection from inadvertant
Write, Program and Erase instructions, as all
instructions are ignored except one particular
instruction (the Release from Deep Power-
down instruction).
–
–
–
■
■
■
Table 2. Protected Area Sizes
Note: 1. The device is ready to accept a Bulk Erase instruction if, and only if, all Block Protect (BP2, BP1, BP0) are 0.
Status Register
Content
Memory Content
BP2
Bit
BP1
Bit
BP0
Bit
Protected Area
Unprotected Area
0
0
0
none
All sectors
1
(eight sectors: 0 to 7)
0
0
1
Upper eighth (Sector 7)
Lower seven-eighths (seven sectors: 0 to 6)
0
1
0
Upper quarter (two sectors: 6 and 7)
Lower three-quarters (six sectors: 0 to 5)
0
1
1
Upper half (four sectors: 4 to 7)
Lower half (four sectors: 0 to 3)
1
0
0
All sectors (eight sectors: 0 to 7)
none
1
0
1
All sectors (eight sectors: 0 to 7)
none
1
1
0
All sectors (eight sectors: 0 to 7)
none
1
1
1
All sectors (eight sectors: 0 to 7)
none
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PDF描述 |
|---|---|
| M25P40-VMN3TP | 4 Mbit Uniform Sector, Serial Flash Memory |
| M25P40-VMN6 | 4 Mbit Uniform Sector, Serial Flash Memory |
| M25P40-VMN6G | 4 Mbit Uniform Sector, Serial Flash Memory |
| M25P40-VMN6P | 4 Mbit Uniform Sector, Serial Flash Memory |
| M25P40-VMN6TG | 4 Mbit Uniform Sector, Serial Flash Memory |
相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| M25P40-VMN3TG/X | 制造商:NUMONYX 制造商全稱:Numonyx B.V 功能描述:4 Mbit, low voltage, serial Flash memory with 50 MHz SPI bus interface |
| M25P40VMN3TP | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:512 Kbit to 32 Mbit, Low Voltage, Serial Flash Memory With 40 MHz or 50 MHz SPI Bus Interface |
| M25P40-VMN3TP | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:4 Mbit, Low Voltage, Serial Flash Memory With 40MHz SPI Bus Interface |
| M25P40-VMN3TP/X | 功能描述:IC FLASH 4MBIT 25MHZ 8SOIC RoHS:是 類別:集成電路 (IC) >> 存儲器 系列:Forté™ 產(chǎn)品變化通告:Product Discontinuation 26/Apr/2010 標準包裝:136 系列:- 格式 - 存儲器:RAM 存儲器類型:SRAM - 同步，DDR II 存儲容量:18M（1M x 18） 速度:200MHz 接口:并聯(lián) 電源電壓:1.7 V ~ 1.9 V 工作溫度:0°C ~ 70°C 封裝/外殼:165-TBGA 供應商設備封裝:165-CABGA（13x15） 包裝:托盤 其它名稱:71P71804S200BQ |
| M25P40-VMN3TPB | 功能描述:IC SRL FLASH 4MBIT 3V 75MHZ S08N RoHS:是 類別:集成電路 (IC) >> 存儲器 系列:Forté™ 標準包裝:2,000 系列:- 格式 - 存儲器:RAM 存儲器類型:SRAM - 異步 存儲容量:256K (32K x 8) 速度:15ns 接口:并聯(lián) 電源電壓:3 V ~ 3.6 V 工作溫度:-40°C ~ 85°C 封裝/外殼:28-TSSOP（0.465"，11.8mm 寬） 供應商設備封裝:28-TSOP 包裝:帶卷 (TR) 其它名稱:71V256SA15PZGI8 |
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