- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄383292 > M25P40-VMN3 (意法半導(dǎo)體) 4 Mbit Uniform Sector, Serial Flash Memory PDF資料下載
參數(shù)資料
| 型號： | M25P40-VMN3 |
| 廠商： | 意法半導(dǎo)體 |
| 元件分類： | DRAM |
| 英文描述： | 4 Mbit Uniform Sector, Serial Flash Memory |
| 中文描述： | 4兆位統(tǒng)一部門，串行閃存 |
| 文件頁數(shù)： | 26/40頁 |
| 文件大?。?/td> | 232K |
| 代理商： | M25P40-VMN3 |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁當(dāng)前第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁
M25P40
26/40
POWER-UP AND POWER-DOWN
At Power-up and Power-down, the device must
not be selected (that is Chip Select (S) must follow
the voltage applied on V
CC
) until V
CC
reaches the
correct value:
–
V
CC
(min) at Power-up, and then for a further
delay of t
VSL
–
V
SS
at Power-down
Usually a simple pull-up resistor on Chip Select (S)
can be used to insure safe and proper Power-up
and Power-down.
To avoid data corruption and inadvertent write op-
erations during power up, a Power On Reset
(POR) circuit is included. The logic inside the de-
vice is held reset while V
CC
is less than the POR
threshold value, V
WI
– all operations are disabled,
and the device does not respond to any instruc-
tion.
Moreover, the device ignores all Write Enable
(WREN), Page Program (PP), Sector Erase (SE),
Bulk Erase (BE) and Write Status Register
(WRSR) instructions until a time delay of t
PUW
has
elapsed after the moment that V
CC
rises above the
V
WI
threshold. However, the correct operation of
the device is not guaranteed if, by this time, V
CC
is
still below V
CC
(min). No Write Status Register,
Program or Erase instructions should be sent until
the later of:
–
t
PUW
after V
CC
passed the V
WI
threshold
–
t
VSL
afterV
CC
passed the V
CC
(min) level
These values are specified in
Table 7.
.
If the delay, t
VSL
, has elapsed, after V
CC
has risen
above V
CC
(min), the device can be selected for
READ instructions even if the t
PUW
delay is not yet
fully elapsed.
At Power-up, the device is in the following state:
–
The device is in the Standby mode (not the
Deep Power-down mode).
–
The Write Enable Latch (WEL) bit is reset.
Normal precautions must be taken for supply rail
decoupling, to stabilize the V
CC
feed. Each device
in a system should have the V
CC
rail decoupled by
a suitable capacitor close to the package pins.
(Generally, this capacitor is of the order of 0.1μF).
At Power-down, when V
CC
drops from the operat-
ing voltage, to below the POR threshold value,
V
WI
, all operations are disabled and the device
does not respond to any instruction. (The designer
needs to be aware that if a Power-down occurs
while a Write, Program or Erase cycle is in
progress, some data corruption can result.)
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| M25P40-VMN3G | 4 Mbit Uniform Sector, Serial Flash Memory |
| M25P40-VMN3P | 4 Mbit Uniform Sector, Serial Flash Memory |
| M25P40-VMN3T | 4 Mbit Uniform Sector, Serial Flash Memory |
| M25P40-VMN3TG | 4 Mbit Uniform Sector, Serial Flash Memory |
| M25P40-VMN3TP | 4 Mbit Uniform Sector, Serial Flash Memory |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| M25P40VMN3G | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:512 Kbit to 32 Mbit, Low Voltage, Serial Flash Memory With 40 MHz or 50 MHz SPI Bus Interface |
| M25P40-VMN3G | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:4 Mbit, Low Voltage, Serial Flash Memory With 40MHz SPI Bus Interface |
| M25P40-VMN3G/X | 制造商:NUMONYX 制造商全稱:Numonyx B.V 功能描述:4 Mbit, low voltage, serial Flash memory with 50 MHz SPI bus interface |
| M25P40VMN3P | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:512 Kbit to 32 Mbit, Low Voltage, Serial Flash Memory With 40 MHz or 50 MHz SPI Bus Interface |
| M25P40-VMN3P | 制造商:Micron Technology Inc 功能描述:AUTOMOTIVE FLASH - Rail/Tube |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。