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參數(shù)資料
| 型號： | M21L216128A |
| 廠商： | Electronic Theatre Controls, Inc. |
| 英文描述： | 128 K x 16 SRAM HIGH SPEED CMOS SRAM |
| 中文描述： | 128畝× 16 SRAM的高速CMOS的SRAM |
| 文件頁數(shù)： | 6/14頁 |
| 文件大?。?/td> | 168K |
| 代理商： | M21L216128A |
(607
M21L216128A
Elite Semiconduture Memory Technology Inc
Publication Date
:
Sep. 2000
Revision
:
1.0
6/14
NOTES
1. All voltages referenced to GND (VSS).
2. Overshoot : V
IH
≤
+6.0V for t
≤
t
RC
/2.
Undershoot : V
IL
≤
-2.0V for t
≤
t
RC
/2.
3. I
CC
is given without output current. ICC increases with greater output loading and faster cycle times.
4. This parameter is sampled.
5. Test conditions as specified with the output loading as shown in Fig. 1 unless otherwise noted.
6. Output loading is specified with CL=5pF as in Fig.2. Transition is measured
±
500mV from steady static voltage.
7. At any give temperature and voltage conditions, t
CHZ
is less than t
CLZ
and t
WHZ
is less than t
OW
8.
WE
is High for Read cycle.
9. Device is continuously selected. Chip enable and output enables are held in their active state.
10. Address valid prior to, or coincident with, latest occurring chip enable.
11. t
RC
=Read Cycle Time.
12. Chip Enable and Write Enable can initiate and terminate a Write cycle.
13. Capacitance derating applies to capacitance different from the load capacitance shown in
Fig. 1.
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相關代理商/技術參數(shù) |
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|---|---|
| M21L216128A-10J | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:128 K x 16 SRAM HIGH SPEED CMOS SRAM |
| M21L216128A-10T | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:128 K x 16 SRAM HIGH SPEED CMOS SRAM |
| M21L216128A-12J | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:128 K x 16 SRAM HIGH SPEED CMOS SRAM |
| M21L216128A-12T | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:128 K x 16 SRAM HIGH SPEED CMOS SRAM |
| M21L216128A-15J | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:128 K x 16 SRAM HIGH SPEED CMOS SRAM |
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