2-58 Revision 23 Timing Characteristics Applies to 1.5 V DC Core Voltage Table 2-83 2.5 V LV" />
鍙冩暩(sh霉)璩囨枡
鍨嬭櫉(h脿o)锛� M1AGL1000V5-FG256I
寤犲晢锛� Microsemi SoC
鏂囦欢闋�(y猫)鏁�(sh霉)锛� 223/250闋�(y猫)
鏂囦欢澶�?銆�?/td> 0K
鎻忚堪锛� IC FPGA 1KB FLASH 1M 256-FBGA
妯�(bi膩o)婧�(zh菙n)鍖呰锛� 90
绯诲垪锛� IGLOO
閭忚集鍏冧欢/鍠厓鏁�(sh霉)锛� 24576
RAM 浣嶇附瑷�(j矛)锛� 147456
杓稿叆/杓稿嚭鏁�(sh霉)锛� 177
闁€鏁�(sh霉)锛� 1000000
闆绘簮闆诲锛� 1.425 V ~ 1.575 V
瀹夎椤炲瀷锛� 琛ㄩ潰璨艰
宸ヤ綔婧害锛� -40°C ~ 85°C
灏佽/澶栨锛� 256-LBGA
渚涙噳(y墨ng)鍟嗚ō(sh猫)鍌欏皝瑁濓細 256-FPBGA锛�17x17锛�
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IGLOO DC and Switching Characteristics
2-58
Revision 23
Timing Characteristics
Applies to 1.5 V DC Core Voltage
Table 2-83 2.5 V LVCMOS Low Slew 鈥� Applies to 1.5 V DC Core Voltage
Commercial-Case Conditions: TJ = 70掳C, Worst-Case VCC = 1.425 V, Worst-Case VCCI = 2.3 V
Applicable to Advanced I/O Banks
Drive Strength
Speed Grade tDOUT tDP tDIN tPY tEOUT tZL
tZH
tLZ
tHZ
tZLS
tZHS Units
4 mA
Std.
0.97
4.96 0.18 1.08
0.66
5.06 4.59 2.26 2.00
8.66
8.19
ns
6 mA
Std.
0.97
4.15 0.18 1.08
0.66
4.24 3.94 2.54 2.51
7.83
7.53
ns
8 mA
Std.
0.97
4.15 0.18 1.08
0.66
4.24 3.94 2.54 2.51
7.83
7.53
ns
12 mA
Std.
0.97
3.57 0.18 1.08
0.66
3.65 3.47 2.73 2.84
7.24
7.06
ns
16 mA
Std.
0.97
3.39 0.18 1.08
0.66
3.46 3.36 2.78 2.92
7.06
6.95
ns
24 mA
Std.
0.97
3.38 0.18 1.08
0.66
3.38 3.38 2.83 3.25
6.98
ns
Note: For specific junction temperature and voltage supply levels, refer to Table 2-6 on page 2-7 for derating values.
Table 2-84 2.5 V LVCMOS High Slew 鈥� Applies to 1.5 V DC Core Voltage
Commercial-Case Conditions: TJ = 70掳C, Worst-Case VCC = 1.425 V, Worst-Case VCCI = 2.3 V
Applicable to Advanced I/O Banks
Drive Strength
Speed Grade tDOUT tDP tDIN tPY tEOUT tZL
tZH
tLZ
tHZ
tZLS
tZHS Units
4 mA
Std.
0.97
2.77 0.18 1.08
0.66
2.83 2.60 2.26 2.08
6.42
6.19
ns
6 mA
Std.
0.97
2.34 0.18 1.08
0.66
2.39 2.08 2.54 2.60
5.99
5.68
ns
8 mA
Std.
0.97
2.34 0.18 1.08
0.66
2.39 2.08 2.54 2.60
5.99
5.68
ns
12 mA
Std.
0.97
2.09 0.18 1.08
0.66
2.14 1.83 2.73 2.93
5.73
5.43
ns
16 mA
Std.
0.97
2.05 0.18 1.08
0.66
2.09 1.78 2.78 3.02
5.69
5.38
ns
24 mA
Std.
0.97
2.06 0.18 1.08
0.66
2.10 1.72 2.83 3.35
5.70
5.32
ns
Notes:
1. Software default selection highlighted in gray.
2. For specific junction temperature and voltage supply levels, refer to Table 2-6 on page 2-7 for derating values.
Table 2-85 2.5 V LVCMOS Low Slew 鈥� Applies to 1.5 V DC Core Voltage
Commercial-Case Conditions: TJ = 70掳C, Worst-Case VCC = 1.425 V, Worst-Case VCCI = 2.3 V
Applicable to Standard Plus Banks
Drive Strength
Speed Grade tDOUT tDP tDIN tPY tEOUT tZL
tZH
tLZ
tHZ
tZLS
tZHS Units
4 mA
Std.
0.97
4.42 0.18 1.08
0.66
4.51 4.10 1.96 1.85
8.10
7.69
ns
6 mA
Std.
0.97
3.62 0.18 1.08
0.66
3.70 3.52 2.21 2.32
7.29
7.11
ns
8 mA
Std.
0.97
3.62 0.18 1.08
0.66
3.70 3.52 2.21 2.32
7.29
7.11
ns
12 mA
Std.
0.97
3.09 0.18 1.08
0.66
3.15 3.09 2.39 2.61
6.74
6.68
ns
Note: For specific junction temperature and voltage supply levels, refer to Table 2-6 on page 2-7 for derating values.
鐩搁棞(gu膩n)PDF璩囨枡
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