Revision 4 2-147 5 V Input Tolerance I/Os can support 5 V input tolerance when LVTTL 3.3 V, LVCMOS 3.3 V, LVCM" />
參數(shù)資料
型號: M1AFS600-2FGG256
廠商: Microsemi SoC
文件頁數(shù): 72/334頁
文件大小: 0K
描述: IC FPGA 4MB FLASH 600K 256-FBGA
標準包裝: 90
系列: Fusion®
RAM 位總計: 110592
輸入/輸出數(shù): 119
門數(shù): 600000
電源電壓: 1.425 V ~ 1.575 V
安裝類型: 表面貼裝
工作溫度: 0°C ~ 85°C
封裝/外殼: 256-LBGA
供應商設備封裝: 256-FPBGA(17x17)
Fusion Family of Mixed Signal FPGAs
Revision 4
2-147
5 V Input Tolerance
I/Os can support 5 V input tolerance when LVTTL 3.3 V, LVCMOS 3.3 V, LVCMOS 2.5 V / 5 V, and
LVCMOS 2.5 V configurations are used (see Table 2-77 on page 2-150 for more details). There are four
recommended solutions (see Figure 2-103 to Figure 2-106 on page 2-149 for details of board and macro
setups) to achieve 5 V receiver tolerance. All the solutions meet a common requirement of limiting the
voltage at the input to 3.6 V or less. In fact, the I/O absolute maximum voltage rating is 3.6 V, and any
voltage above 3.6 V may cause long-term gate oxide failures.
Solution 1
The board-level design needs to ensure that the reflected waveform at the pad does not exceed the limits
provided in Table 3-4 on page 3-4. This is a long-term reliability requirement.
This scheme will also work for a 3.3 V PCI / PCI-X configuration, but the internal diode should not be
used for clamping, and the voltage must be limited by the two external resistors, as explained below.
Relying on the diode clamping would create an excessive pad DC voltage of 3.3 V + 0.7 V = 4 V.
The following are some examples of possible resistor values (based on a simplified simulation model
with no line effects and 10
transmitter output resistance, where Rtx_out_high = (VCCI – VOH) / IOH,
Rtx_out_low = VOL / IOL).
Example 1 (high speed, high current):
Rtx_out_high = Rtx_out_low = 10
R1 = 36
(±5%), P(r1)min = 0.069
R2 = 82
(±5%), P(r2)min = 0.158
Imax_tx = 5.5 V / (82 * 0.95 + 36 * 0.95 + 10) = 45.04 mA
tRISE =tFALL = 0.85 ns at C_pad_load = 10 pF (includes up to 25% safety margin)
tRISE =tFALL = 4 ns at C_pad_load = 50 pF (includes up to 25% safety margin)
Example 2 (low–medium speed, medium current):
Rtx_out_high = Rtx_out_low = 10
R1 = 220
(±5%), P(r1)min = 0.018
R2 = 390
(±5%), P(r2)min = 0.032
Imax_tx = 5.5 V / (220 * 0.95 + 390 * 0.95 + 10) = 9.17 mA
tRISE =tFALL = 4 ns at C_pad_load = 10 pF (includes up to 25% safety margin)
tRISE =tFALL = 20 ns at C_pad_load = 50 pF (includes up to 25% safety margin)
Other values of resistors are also allowed as long as the resistors are sized appropriately to limit the
voltage at the receiving end to 2.5 V < Vin(rx) < 3.6 V when the transmitter sends a logic 1. This range of
Vin_dc(rx) must be assured for any combination of transmitter supply (5 V ± 0.5 V), transmitter output
resistance, and board resistor tolerances.
相關PDF資料
PDF描述
P1AFS600-2FG256 IC FPGA PIGEON POINT 256-FBGA
ASM40DRSH CONN EDGECARD 80POS DIP .156 SLD
P1AFS600-2FGG256 IC FPGA PIGEON POINT 256-FBGA
AFS600-2FGG256 IC FPGA 4MB FLASH 600K 256FBGA
AFS600-2FG256 IC FPGA 4MB FLASH 600K 256FBGA
相關代理商/技術參數(shù)
參數(shù)描述
M1AFS600-2FGG256ES 制造商:ACTEL 制造商全稱:Actel Corporation 功能描述:Actel Fusion Mixed-Signal FPGAs
M1AFS600-2FGG256I 功能描述:IC FPGA 4MB FLASH 600K 256-FBGA RoHS:是 類別:集成電路 (IC) >> 嵌入式 - FPGA(現(xiàn)場可編程門陣列) 系列:Fusion® 產(chǎn)品培訓模塊:Three Reasons to Use FPGA's in Industrial Designs Cyclone IV FPGA Family Overview 特色產(chǎn)品:Cyclone? IV FPGAs 標準包裝:60 系列:CYCLONE® IV GX LAB/CLB數(shù):9360 邏輯元件/單元數(shù):149760 RAM 位總計:6635520 輸入/輸出數(shù):270 門數(shù):- 電源電壓:1.16 V ~ 1.24 V 安裝類型:表面貼裝 工作溫度:0°C ~ 85°C 封裝/外殼:484-BGA 供應商設備封裝:484-FBGA(23x23)
M1AFS600-2FGG256PP 制造商:ACTEL 制造商全稱:Actel Corporation 功能描述:Actel Fusion Mixed-Signal FPGAs
M1AFS600-2FGG484 功能描述:IC FPGA 4MB FLASH 600K 484-FBGA RoHS:是 類別:集成電路 (IC) >> 嵌入式 - FPGA(現(xiàn)場可編程門陣列) 系列:Fusion® 標準包裝:40 系列:SX-A LAB/CLB數(shù):6036 邏輯元件/單元數(shù):- RAM 位總計:- 輸入/輸出數(shù):360 門數(shù):108000 電源電壓:2.25 V ~ 5.25 V 安裝類型:表面貼裝 工作溫度:0°C ~ 70°C 封裝/外殼:484-BGA 供應商設備封裝:484-FPBGA(27X27)
M1AFS600-2FGG484I 功能描述:IC FPGA 4MB FLASH 600K 484-FBGA RoHS:是 類別:集成電路 (IC) >> 嵌入式 - FPGA(現(xiàn)場可編程門陣列) 系列:Fusion® 產(chǎn)品培訓模塊:Three Reasons to Use FPGA's in Industrial Designs Cyclone IV FPGA Family Overview 特色產(chǎn)品:Cyclone? IV FPGAs 標準包裝:60 系列:CYCLONE® IV GX LAB/CLB數(shù):9360 邏輯元件/單元數(shù):149760 RAM 位總計:6635520 輸入/輸出數(shù):270 門數(shù):- 電源電壓:1.16 V ~ 1.24 V 安裝類型:表面貼裝 工作溫度:0°C ~ 85°C 封裝/外殼:484-BGA 供應商設備封裝:484-FBGA(23x23)