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鍙冩暩(sh霉)璩囨枡
鍨嬭櫉锛� M1AFS1500-FG676I
寤犲晢锛� Microsemi SoC
鏂囦欢闋佹暩(sh霉)锛� 120/334闋�
鏂囦欢澶у皬锛� 0K
鎻忚堪锛� IC FPGA 8MB FLASH 1.5M 676-FBGA
妯欐簴鍖呰锛� 40
绯诲垪锛� Fusion®
RAM 浣嶇附瑷堬細 276480
杓稿叆/杓稿嚭鏁�(sh霉)锛� 252
闁€鏁�(sh霉)锛� 1500000
闆绘簮闆诲锛� 1.425 V ~ 1.575 V
瀹夎椤炲瀷锛� 琛ㄩ潰璨艰
宸ヤ綔婧害锛� -40°C ~ 100°C
灏佽/澶栨锛� 676-BGA
渚涙噳(y墨ng)鍟嗚ō(sh猫)鍌欏皝瑁濓細 676-FBGA锛�27x27锛�
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Device Architecture
2-190
Revision 4
1.8 V LVCMOS
Low-Voltage CMOS for 1.8 V is an extension of the LVCMOS standard (JESD8-5) used for general-
purpose 1.8 V applications. It uses a 1.8 V input buffer and push-pull output buffer.
Table 2-118 Minimum and Maximum DC Input and Output Levels
1.8 V
LVCMOS
VIL
VIH
VOL
VOH
IOL IOH IOSL
IOSH
IIL1 IIH2
Drive
Strength
Min.
V
Max.
V
Min.
V
Max.
V
Max.
V
Min.
VmA mA
Max.
mA3
Max.
mA3
A4 A4
Applicable to Pro I/O Banks
2 mA
鈥�0.3
0.35 * VCCI 0.65 * VCCI
3.6
0.45 VCCI 鈥� 0.45
2
11
9
10
4 mA
鈥�0.3
0.35 * VCCI 0.65 * VCCI
3.6
0.45 VCCI 鈥� 0.45
4
22
17
10
6 mA
鈥�0.3
0.35 * VCCI 0.65 * VCCI
3.6
0.45 VCCI 鈥� 0.45
6
44
35
10
8 mA
鈥�0.3
0.35 * VCCI 0.65 * VCCI
3.6
0.45 VCCI 鈥� 0.45
8
51
45
10
12 mA
鈥�0.3
0.35 * VCCI 0.65 * VCCI
3.6
0.45 VCCI 鈥� 0.45 12
12
74
91
10
16 mA
鈥�0.3
0.35 * VCCI 0.65 * VCCI
3.6
0.45 VCCI 鈥� 0.45 16
16
74
91
10
Applicable to Advanced I/O Banks
2 mA
鈥�0.3
0.35 * VCCI 0.65 * VCCI
1.9
0.45 VCCI 鈥� 0.45
2
11
9
10
4 mA
鈥�0.3
0.35 * VCCI 0.65 * VCCI
1.9
0.45 VCCI 鈥� 0.45
4
22
17
10
6 mA
鈥�0.3
0.35 * VCCI 0.65 * VCCI
1.9
0.45 VCCI 鈥� 0.45
6
44
35
10
8 mA
鈥�0.3
0.35 * VCCI 0.65 * VCCI
1.9
0.45 VCCI 鈥� 0.45
8
51
45
10
12 mA
鈥�0.3
0.35 * VCCI 0.65 * VCCI
1.9
0.45 VCCI 鈥� 0.45 12
12
74
91
10
16 mA
鈥�0.3
0.35 * VCCI 0.65 * VCCI
1.9
0.45 VCCI 鈥� 0.45 16
16
74
91
10
Applicable to Standard I/O Banks
2 mA
鈥�0.3
0.35 * VCCI 0.65 * VCCI
3.6
0.45 VCCI 鈥� 0.45
2
11
9
10
4 mA
鈥�0.3
0.35 * VCCI 0.65 * VCCI
3.6
0.45 VCCI 鈥� 0.45
4
22
17
10
Notes:
1. IIL is the input leakage current per I/O pin over recommended operation conditions where 鈥�0.3 V < VIN < VIL.
2. IIH is the input leakage current per I/O pin over recommended operating conditions VIH < VIN < VCCI. Input current is
larger when operating outside recommended ranges.
3. Currents are measured at high temperature (100掳C junction temperature) and maximum voltage.
4. Currents are measured at 85掳C junction temperature.
5. Software default selection highlighted in gray.
Figure 2-121 AC Loading
Table 2-119 AC Waveforms, Measuring Points, and Capacitive Loads
Input Low (V)
Measuring Point* (V)
VREF (typ.) (V)
CLOAD (pF)
01.8
0.9
鈥�
35
Note: *Measuring point = Vtrip. See Table 2-90 on page 2-169 for a complete table of trip points.
Test Point
Enable Path
Data Path
35 pF
R = 1 k
R to VCCI for tLZ / tZL / tZLS
R to GND for tHZ / tZH / tZHS
35 pF for tZH / tZHS / tZL / tZLS
35 pF for tHZ / tLZ
鐩搁棞(gu膩n)PDF璩囨枡
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M1AFS1500-FGG676I IC FPGA 8MB FLASH 1.5M 676-FBGA
5-208744-1 CONN D-SUB PLUG HSING 36C4 MIX
5-208550-1 CONN D-SUB RCPT HSING 36C4 MIX
5-208810-1 CONN D-SUB PLUG HSING 13C3 MIX
5-212526-1 CONN D-SUB RECEPT 109 MIX 21C1
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