Revision 4 III Product Ordering Codes Fusion Device Status Notes: 1. For Fusion devices, Quad Flat N" />
鍙冩暩(sh霉)璩囨枡
鍨嬭櫉锛� M1AFS1500-1FG256
寤犲晢锛� Microsemi SoC
鏂囦欢闋佹暩(sh霉)锛� 223/334闋�
鏂囦欢澶�?銆�?/td> 0K
鎻忚堪锛� IC FPGA 8MB FLASH 1.5M 256-FBGA
妯欐簴鍖呰锛� 90
绯诲垪锛� Fusion®
RAM 浣嶇附瑷堬細 276480
杓稿叆/杓稿嚭鏁�(sh霉)锛� 119
闁€鏁�(sh霉)锛� 1500000
闆绘簮闆诲锛� 1.425 V ~ 1.575 V
瀹夎椤炲瀷锛� 琛ㄩ潰璨艰
宸ヤ綔婧害锛� 0°C ~ 85°C
灏佽/澶栨锛� 256-LBGA
渚涙噳(y墨ng)鍟嗚ō(sh猫)鍌欏皝瑁濓細 256-FPBGA锛�17x17锛�
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Fusion Family of Mixed Signal FPGAs
Revision 4
III
Product Ordering Codes
Fusion Device Status
Notes:
1. For Fusion devices, Quad Flat No Lead packages are only offered as RoHS compliant, QNG packages.
2. MicroBlade and Pigeon Point devices only support FG packages.
Fusion
Status
Cortex-M1
Status
Pigeon Point
Status
MicroBlade
Status
AFS090
Production
AFS250
Production
M1AFS250
Production
U1AFS250
Production
AFS600
Production
M1AFS600
Production
P1AFS600
Production
U1AFS600
Production
AFS1500
Production
M1AFS1500
Production
P1AFS1500
Production
U1AFS1500
Production
M1AFS600
FG
_
Part Number
Fusion Devices
Speed Grade
1
Blank = Standard
1 = 15% Faster than Standard
2 = 25% Faster than Standard
Package Type
QN = Quad Flat No Lead (0.5 mm pitch)
256
I
G
Package Lead Count
Y
Security Feature
Application (junction temperature range)
Blank = Commercial (0 to +85掳C)
I = Industrial (鈥�40 to +100掳C)
PP = Pre-Production
ES = Engineering Silicon (room temperature only)
90,000 System Gates
AFS090 =
250,000 System Gates
AFS250 =
ARM-Enabled Fusion Devices
600,000 System Gates
AFS600 =
1,500,000 System Gates
AFS1500 =
MicroBlade Devices
250,000 System Gates
U1AFS250 =
600,000 System Gates
U1AFS600 =
1,500,000 System Gates
U1AFS1500 =
Pigeon Point Devices
600,000 System Gates
P1AFS600 =
1,500,000 System Gates
P1AFS1500 =
250,000 System Gates
M1AFS250 =
600,000 System Gates
M1AFS600 =
1,500,000 System Gates
M1AFS1500 =
PQ = Plastic Quad Flat Pack (0.5 mm pitch)
FG = Fine Pitch Ball Grid Array (1.0 mm pitch)
Lead-Free Packaging Options
Blank = Standard Packaging
G = RoHS-Compliant (green) Packaging
1
2
Y = Device Includes License to Implement IP Based on
the Cryptography Research, Inc. (CRI) Patent Portfolio
Blank = Device Does Not Include License to Implement IP Based
on the Cryptography Research, Inc. (CRI) Patent Portfolio
鐩搁棞(gu膩n)PDF璩囨枡
PDF鎻忚堪
M1AFS1500-1FGG256 IC FPGA 8MB FLASH 1.5M 256-FBGA
ACM36DTMN-S664 CONN EDGECARD 72POS R/A .156
AFS1500-1FGG256 IC FPGA 8MB FLASH 1.5M 256-FBGA
AFS1500-1FG256 IC FPGA 8MB FLASH 1.5M 256-FBGA
11AA160-I/P IC EEPROM 16KBIT 100KHZ 8DIP
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M1AFS1500-1FG256ES 鍒堕€犲晢:ACTEL 鍒堕€犲晢鍏ㄧū:Actel Corporation 鍔熻兘鎻忚堪:Actel Fusion Mixed-Signal FPGAs
M1AFS1500-1FG256I 鍔熻兘鎻忚堪:IC FPGA 8MB FLASH 1.5M 256-FBGA RoHS:鍚� 椤炲垾:闆嗘垚闆昏矾 (IC) >> 宓屽叆寮� - FPGA锛堢従(xi脿n)鍫村彲绶ㄧ▼闁€闄e垪锛� 绯诲垪:Fusion® 妯欐簴鍖呰:1 绯诲垪:ProASICPLUS LAB/CLB鏁�(sh霉):- 閭忚集鍏冧欢/鍠厓鏁�(sh霉):- RAM 浣嶇附瑷�:129024 杓稿叆/杓稿嚭鏁�(sh霉):248 闁€鏁�(sh霉):600000 闆绘簮闆诲:2.3 V ~ 2.7 V 瀹夎椤炲瀷:琛ㄩ潰璨艰 宸ヤ綔婧害:- 灏佽/澶栨:352-BFCQFP锛屽付鎷夋】 渚涙噳(y墨ng)鍟嗚ō(sh猫)鍌欏皝瑁�:352-CQFP锛�75x75锛�
M1AFS1500-1FG256K 鍔熻兘鎻忚堪:IC FPGA 8MB FLASH 1.5M 256-FBGA RoHS:鍚� 椤炲垾:闆嗘垚闆昏矾 (IC) >> 宓屽叆寮� - FPGA锛堢従(xi脿n)鍫村彲绶ㄧ▼闁€闄e垪锛� 绯诲垪:Fusion® 妯欐簴鍖呰:1 绯诲垪:ProASICPLUS LAB/CLB鏁�(sh霉):- 閭忚集鍏冧欢/鍠厓鏁�(sh霉):- RAM 浣嶇附瑷�:129024 杓稿叆/杓稿嚭鏁�(sh霉):248 闁€鏁�(sh霉):600000 闆绘簮闆诲:2.3 V ~ 2.7 V 瀹夎椤炲瀷:琛ㄩ潰璨艰 宸ヤ綔婧害:- 灏佽/澶栨:352-BFCQFP锛屽付鎷夋】 渚涙噳(y墨ng)鍟嗚ō(sh猫)鍌欏皝瑁�:352-CQFP锛�75x75锛�
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M1AFS1500-1FG484 鍔熻兘鎻忚堪:IC FPGA 8MB FLASH 1.5M 484-FBGA RoHS:鍚� 椤炲垾:闆嗘垚闆昏矾 (IC) >> 宓屽叆寮� - FPGA锛堢従(xi脿n)鍫村彲绶ㄧ▼闁€闄e垪锛� 绯诲垪:Fusion® 鐢�(ch菐n)鍝佸煿瑷撴ā濉�:Three Reasons to Use FPGA's in Industrial Designs Cyclone IV FPGA Family Overview 鐗硅壊鐢�(ch菐n)鍝�:Cyclone? IV FPGAs 妯欐簴鍖呰:60 绯诲垪:CYCLONE® IV GX LAB/CLB鏁�(sh霉):9360 閭忚集鍏冧欢/鍠厓鏁�(sh霉):149760 RAM 浣嶇附瑷�:6635520 杓稿叆/杓稿嚭鏁�(sh霉):270 闁€鏁�(sh霉):- 闆绘簮闆诲:1.16 V ~ 1.24 V 瀹夎椤炲瀷:琛ㄩ潰璨艰 宸ヤ綔婧害:0°C ~ 85°C 灏佽/澶栨:484-BGA 渚涙噳(y墨ng)鍟嗚ō(sh猫)鍌欏皝瑁�:484-FBGA锛�23x23锛�