2-22 Revision 13 The length of time an I/O can withstand IOSH/IOSL events depends on the junction tempe" />
參數(shù)資料
型號(hào)： M1A3PE3000-FGG896I
廠商： Microsemi SoC
文件頁數(shù)： 93/162頁
文件大?。?/td> 0K
描述： IC FPGA 1KB FLASH 3M 896-FBGA
標(biāo)準(zhǔn)包裝： 27
系列： ProASIC3E
RAM 位總計(jì)： 516096
輸入/輸出數(shù)： 620
門數(shù)： 3000000
電源電壓： 1.425 V ~ 1.575 V
安裝類型： 表面貼裝
工作溫度： -40°C ~ 85°C
封裝/外殼： 896-BGA
供應(yīng)商設(shè)備封裝： 896-FBGA（31x31）
ProASIC3E DC and Switching Characteristics
2-22
Revision 13
The length of time an I/O can withstand IOSH/IOSL events depends on the junction temperature. The
reliability data below is based on a 3.3 V, 36 mA I/O setting, which is the worst case for this type of
analysis.
For example, at 100°C, the short current condition would have to be sustained for more than six months
to cause a reliability concern. The I/O design does not contain any short circuit protection, but such
protection would only be needed in extremely prolonged stress conditions.
Table 2-21 I/O Short Currents IOSH/IOSL
Drive Strength
IOSH (mA)*
IOSL (mA)*
3.3 V LVTTL / 3.3 V LVCMOS
4 mA
25
27
8 mA
51
54
12 mA
103
109
16 mA
132
127
24 mA
268
181
3.3 V LVCMOS Wide Range
100 A
Same as regular
3.3 V LVCMOS
Same as regular
3.3 V LVCMOS
2.5 V LVCMOS
4 mA
16
18
8 mA
32
37
12 mA
65
74
16 mA
83
87
24 mA
169
124
1.8 V LVCMOS
2 mA
9
11
4 mA
17
22
6 mA
35
44
8 mA
45
51
12 mA
91
74
16 mA
91
74
1.5 V LVCMOS
2 mA
13
16
4 mA
25
33
6 mA
32
39
8 mA
66
55
12 mA
66
55
Notes:
1. TJ = 100°C
2. Applicable to 3.3 V LVCMOS Wide Range. IOSL/IOSH dependent on the I/O buffer drive strength
selected for wide range applications. All LVCMOS 3.3 V software macros support LVCMOS 3.3 V wide
range as specified in the JESD8b specification.
Table 2-22 Duration of Short Circuit Event Before Failure
Temperature
Time before Failure
–40°C
> 20 years
0°C
> 20 years
25°C
> 20 years
70°C
5 years
85°C
2 years
100°C
6 months
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