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鍙冩暩(sh霉)璩囨枡
鍨嬭櫉锛� M1A3P1000-2PQ208I
寤犲晢锛� Microsemi SoC
鏂囦欢闋佹暩(sh霉)锛� 5/12闋�
鏂囦欢澶у皬锛� 0K
鎻忚堪锛� IC FPGA M1 1KB FLASH 1M 208PQFP
妯�(bi膩o)婧�(zh菙n)鍖呰锛� 24
绯诲垪锛� ProASIC3
RAM 浣嶇附瑷堬細 147456
杓稿叆/杓稿嚭鏁�(sh霉)锛� 154
闁€鏁�(sh霉)锛� 1000000
闆绘簮闆诲锛� 1.425 V ~ 1.575 V
瀹夎椤炲瀷锛� 琛ㄩ潰璨艰
宸ヤ綔婧害锛� -40°C ~ 85°C
灏佽/澶栨锛� 208-BFQFP
渚涙噳(y墨ng)鍟嗚ō(sh猫)鍌欏皝瑁濓細 208-PQFP锛�28x28锛�
ARM CortexTM-M1
2P ro d u c t B r i e f
Figure 1 shows an ARM Cortex-M1 processor with debug block diagram.
The NVIC is closely coupled to the ARM Cortex-M1 core
to achieve low-latency interrupt processing. The versions
currently available for use in M1 devices support 1
interrupt with 4 levels of priority. Future versions will
support up to 32 interrupts. To simplify software
development, the processor state is automatically saved
on interrupt entry, and restored on interrupt exist, with
no instruction overhead.
The ARM Cortex-M1 Thumb instruction set鈥檚 16-bit
instruction length allows it to approach twice the density
in memory of standard 32-bit ARM code while retaining
most of the ARM performance advantage over a
traditional 16-bit processor using 16-bit registers. This is
possible because Thumb code operates on the 32-bit
register set in the processor. Thumb code is able to
provide up to 65% of the code size of ARM, and 160% of
the performance of an equivalent ARM processor
connected to a 16-bit memory system.
Figure 1 Processor with Debug Block Diagram
Processor with Debug
AHB-PPB
NVIC
Debug Subsystem
AHB Decoder
AHB Multiplexer
AHB Matrix
Debug ITCM Interface
Debug DTCM Interface
Breakpoint Unit
Data Watchpoint Unit
Debug Control
ROM Table
Internal PPB Signals
External Bus Signals
DAP
AHB-AP
SWJ-DP
Memory Interface
ITCM
DTCM
Core
Dbg
AHB Master
NVIC Interrupt Interface External Interface
Debug Port
鐩搁棞(gu膩n)PDF璩囨枡
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M1A3P1000-2PQG144PP 鍒堕€犲晢:ACTEL 鍒堕€犲晢鍏ㄧū:Actel Corporation 鍔熻兘鎻忚堪:ProASIC3 Flash Family FPGAs
M1A3P1000-2PQG208 鍔熻兘鎻忚堪:IC FPGA M1 1KB FLASH 1M 208PQFP RoHS:鏄� 椤炲垾:闆嗘垚闆昏矾 (IC) >> 宓屽叆寮� - FPGA锛堢従(xi脿n)鍫村彲绶ㄧ▼闁€闄e垪锛� 绯诲垪:ProASIC3 妯�(bi膩o)婧�(zh菙n)鍖呰:90 绯诲垪:ProASIC3 LAB/CLB鏁�(sh霉):- 閭忚集鍏冧欢/鍠厓鏁�(sh霉):- RAM 浣嶇附瑷�:36864 杓稿叆/杓稿嚭鏁�(sh霉):157 闁€鏁�(sh霉):250000 闆绘簮闆诲:1.425 V ~ 1.575 V 瀹夎椤炲瀷:琛ㄩ潰璨艰 宸ヤ綔婧害:-40°C ~ 125°C 灏佽/澶栨:256-LBGA 渚涙噳(y墨ng)鍟嗚ō(sh猫)鍌欏皝瑁�:256-FPBGA锛�17x17锛�