參數(shù)資料
型號: M12L64322A
廠商: Electronic Theatre Controls, Inc.
英文描述: 512K x 32 Bit x 4 Banks Synchronous DRAM
中文描述: 為512k × 32位× 4個銀行同步DRAM
文件頁數(shù): 20/44頁
文件大?。?/td> 813K
代理商: M12L64322A
ESMT
M12L64322A
Elite Semiconductor Memory Technology Inc.
Publication Date: May. 2004
Revision
:
1.7
20/44
*Note : 1. To prevent bus contention, there should be at least one gap between data in and data out.
5. Write Interrupted by Precharge & DQM
*Note : 1. To prevent bus contention, DQM should be issued which makes at least one gap between data in and data out.
2. To inhibit invalid write, DQM should be issued.
3. This precharge command and burst write command should be of the same bank, otherwise it is not precharge interrupt
but only another bank precharge of four banks operation.
CLK
i ) C M D
i i ) C M D
i i i ) C M D
i v) C M D
DQ M
DQ M
DQ M
DQ M
DQ
DQ
DQ
DQ
D1
D3
D1
D0
D2
D3
D0
D2
W R
(b) CL=3,BL= 4
R D
W R
R D
W R
D1
D3
D0
D2
D1
D3
D0
D2
R D
W R
H i - Z
D1
D3
D0
D2
Q0
*Not e 1
v) C M D
DQ M
DQ
R D
W R
H i - Z
R D
CLK
C M D
DQ M
DQ
D0
D1
D2
W R
* Not e 3
*Not e 2
Ma s k e d b y D Q M
D3
1) N o r m a l W r i t e ( B L = 4 )
t
RDL(min)
PRE
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