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參數(shù)資料
| 型號： | LXT350PE |
| 英文描述： | PCM TRANSCEIVER|SINGLE|CEPT PCM-30/E-1|CMOS|LDCC|28PIN|PLASTIC |
| 中文描述： | 的PCM收發(fā)器|單|優(yōu)稅PCM-30/E-1 |的CMOS | LDCC | 28腳|塑料 |
| 文件頁數(shù)： | 12/50頁 |
| 文件大?。?/td> | 1197K |
| 代理商： | LXT350PE |
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LXT350
—
T1/E1 Short Haul Transceiver with Crystal-less Jitter Attenuation
12
Datasheet
23
24
25
31
32
35
EC1 / INT
EC2 / SDI
EC3 / SDO
DI
DI
DI/O
HARDWARE MODES:
Equalization Control 1-3
. EC1, EC2, and EC3 specify the pulse equalization,
line build out and equalizer gain limit settings. See
Table 10 on page 29
for
details.
HOST MODES:
Interrupt
. INT goes Low to flag the host when LOS, AIS, QRSS, DFMS or
DFMO bits changes state, or when an elastic store overflow or underflow
occurs. To identify the specific interrupt, read the Performance Status Register
(PSR). To clear or mask an interrupt, write a one to the appropriate bit in the
Interrupt Clear Register (ICR). To re-enable the interrupt, write a zero. INT is an
open drain output
that must be connected to VCC through a pull-up resistor.
Serial Data Input
. SDI inputs the 16-bit serial address/command and data
word. SDI is sampled on the rising edge of SCLK. Timing is shown in
Figure 18
on page 45
.
Serial Data Output
. SDO outputs the 8-bit serial data read from the selected
LXT350 register. When the CLKE pin is High, SDO is valid on the rising edge of
SCLK. When CLKE is Low, SDO is valid on the falling edge of SCLK. SDO
goes to a high-impedance state when the serial port is being written to or when
CS is High. Timing is shown in
Figure 19 on page 46
.
26
36
RLOOP / CS
DI
HARDWARE MODES:
Remote Loopback.
When held High, the clock and data inputs from the
framer (TPOS/TNEG or TDATA) are ignored and the data received from the
twisted-pair line is transmitted back onto the line at the RCLK frequency.
HOST MODES:
Chip Select.
CS is used to access the serial interface. For each read or write
operation, CS must transition from High to Low, and remain Low.
Table 3. LXT350 Signal Descriptions (Continued)
Pin #
Symbol
I/O
1
Description
PLCC
QFP
1. DI = Digital Input; DO = Digital Output; DI/O = Digital Input/Output; AI = Analog Input; AO = Analog Output.
2. Midrange is a voltage level such that 2.3 V
≤
Midrange
≤
2.7 V. Midrange may also be established by letting the pin float.
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相關(guān)代理商/技術(shù)參數(shù) |
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| LXT350QE | 制造商:LEVEL1 功能描述: |
| LXT351 | 制造商:INTEL 制造商全稱:Intel Corporation 功能描述:T1/E1 Short Haul Transceiver with Crystal-less Jitter Attenuation |
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