參數(shù)資料
型號(hào)： LXT331QE
英文描述： LINE INTERFACE|CMOS|QFP|44PIN|PLASTIC
中文描述： 線路接口|的CMOS | QFP封裝| 44PIN |塑料
文件頁(yè)數(shù)： 25/32頁(yè)
文件大小： 395K
代理商： LXT331QE
Dual T1/E1 Line Interface Unit
—
LXT331
Datasheet
25
4.0
Test Specifications
Note:
The minimum and maximum values in
Table 8
through
Table 14
and
Figure 14
through
Figure 17
represent the performance specifications of the LXT331 and are guaranteed by test, except where
noted by design.
Table 8. Absolute Maximum Ratings
Parameter
Sym
Min
Max
Unit
DC supply (referenced to GND)
VCC, TVCC0, TVCC1
-0.3
6.0
V
Input voltage, any pin
1
V
IN
GND - 0.3
Vcc + 0.3
V
Input current, any pin
2
I
IN
-10
10
mA
Storage temperature
T
ST
-65
150
°
C
Caution:
Operations at or beyond these limits may result in permanent damage to the device.
Normal operation is not guaranteed or implied at these extremes.
1. Excluding RTIP and RRING which must stay within - 6 V to VCC + 0.3 V.
2. Transient currents of up to 100 mA will not cause SCR latch-up. TTIP0 & 1, TRING0 & 1, VCC, TVCC0 & 1 and TGND0 & 1
can withstand continuous current of 100 mA.
Table 9. Recommended Operating Conditions
Parameter
Symbol
Minimum
Typical
1
Maximum
Unit
DC supply
2
VCC, TVCC0, TVCC1
4.75
5.0
5.25
V
LXT331PE & QE
ambient
operating temperature
T
A
-40
25
85
°
C
LXT331PH & QH
ambient
operating temperature
T
A
-5
25
85
°
C
1. Typical figures are at 25
°
C and are for design aid only; not guaranteed and not subject to production testing.
2. Variation between TVCC0, TVCC1 and VCC must be less than 0.3 V.
Table 10. Electrical Characteristics
(Over Recommended Operating Range)
Parameter
Sym
Min
Typ
1
Max
Unit
Test Conditions
Total power dissipation - T1
2
(Maximum line length, 75
load)
PP
-
550
680
mW
-40 to +85
°
C
PD
-
550
650
mW
0 to +85
°
C
Total power dissipation - T1
3
(Maximum line length, 43
load)
PP
-
775
1000
mW
-40 to +85
°
C
PD
-
775
980
mW
0 to +85
°
C
Total power dissipation - E1
2
PD
-
380
520
mW
100% ones density
1. Typical figures are at 25
°
C and are for design aid only; not guaranteed and not subject to production testing.
2. 100% 1s density and maximum line length. Driving a line load over operating temperature range. Includes device and load.
Digital input levels are within 10% of the supply rails. Digital outputs are driving a 50 pF capacitive load.
3. 100% 1s density and maximum line length. Driving a line load (corresponding to Rt value of 9.1
and 1:2 transformer ratio)
over operating range. include device and load. Digital input levels are within 10% of the supply rails. Digital outputs are driving
a 50 pF capacitive load.
4. Functionality of pins depends on mode.
5. Output drivers will output CMOS logic levels into CMOS loads.
6. All digital input pins.
7. For MTIP0, MRING0, MTIP1 AND MRING1.
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