參數(shù)資料
型號(hào): LX5122CDBT
廠商: MICROSEMI CORP-ANALOG MIXED SIGNAL GROUP
元件分類: 通用總線功能
英文描述: Terminator
中文描述: 27-LINE SCSI BUS TERMINATOR, PDSO44
封裝: PLASTIC, SSOP-44
文件頁數(shù): 3/4頁
文件大小: 89K
代理商: LX5122CDBT
ULTRA 27-L
INE
, P
LUG
AND
P
LAY
SCSI T
ERMINATOR
LX 5122
PRODUCT DATABOOK 1 9 9 6 / 1 9 9 7
3
Copyright 1999
Rev. 1.0 6/99
P
R O D U C T I O N
D
A T A
S
H E E T
UltraMAX
B L O C K D I A G R A M
F U N C T I O N A L D E S C R I P T I O N
TERM POWER
CURRENT
BIASING
CIRCUIT
1.4V
DISC2
24mA CURRENT
LIMITING CIRCUIT
DATA OUTPUT
PIN DB(0)
2.85V
1 OF 27 CHANNELS
DISC1
V
CC
V
CC
Cable transmission theory suggests that in order to optimize
signal speed and quality, the termination should act both as
an ideal voltage reference when the line is released (de-asserted)
and as an ideal current source when the line is active (asserted).
Common active terminators, which consist of Linear Regulators
in series with resistors (typically 110
), are a compromise. As
the line voltage increases, the amount of current decreases
P
OWER
U
P
/ P
OWER
D
OWN
F
UNCTION
T
ABLE
linearly by the equation V = I *R. The UltraMAX LX5122, with
its unique new architecture, applies the maximum amount of
current regardless of line voltage until the termination high
threshold (2.85V) is reached.
Acting as a near ideal line terminator, the LX5122 closely
reproduces the optimum case when the device is enabled. To
enable the device the DISC1 and DISC2 pins must be driven
per the above table. During this mode of operation,
quiescent current is 12mA and the device will
respond to line demands by delivering 24mA on
assertion and by imposing 2.85V on de-assertion.
Disable mode places the device in a sleep state,
where a meager 150μA of quiescent current is
consumed. Additionally, all outputs are in a Hi-
Z (impedance) state. Sleep mode can be used
for power conservation or to completely eliminate
the terminator from the SCSI chain.
An additional feature of the LX5122 is its com-
patibility with active negation drivers.
Enabled
Enabled
Enabled
Disabled
Disabled
DISC1
DISC2
W1
W2
N1
T1-T18
T19-T27
L
H
H
L
L
L
L
L
L
L
L
H
L
H
L
L
L
L
L
L
L
L
DC
DC
DC
H
H
H
H
L
L
L
L
DC
DC
DC
H
H
L
L
H
H
L
L
DC
DC
DC
H
L
H
L
H
L
H
L
Enabled
Disabled
Disabled
Enabled
Enabled
Enabled
Disabled
Enabled
Disabled
Disabled
Disabled
Disabled
Enabled
Disabled
Enabled
Enabled
Enabled
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