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參數資料
| 型號： | LX432ISET |
| 廠商： | MICROSEMI CORP-ANALOG MIXED SIGNAL GROUP |
| 元件分類： | 基準電壓源/電流源 |
| 英文描述： | 1-OUTPUT TWO TERM VOLTAGE REFERENCE, 1.24 V, PDSO5 |
| 封裝： | PLASTIC, SOT-23, 5 PIN |
| 文件頁數： | 4/11頁 |
| 文件大小： | 95K |
| 代理商： | LX432ISET |
Microsemi
Linfinity Microelectronics Division
11861 Western Avenue, Garden Grove, CA. 92841, 714-898-8121, Fax: 714-893-2570
Page 2
Copyright
2000
Rev. 1.2c, 2001-04-11
WWW.
Microsemi
.COM
LX432
Low Voltage Adjustable Precision Shunt Regulator
PRODUCTION DATA SHEET
A
M I CROSEM I
COM P A N Y
Cathode to Anode Voltage (VKA) ................................................................. -0.3V to +20V
Reference Input Current (IREF).....................................................................-50A to 10A
Continuous Cathode Current (IK)............................................................... -25mA to 25mA
Operating Junction Temperature ............................................................................... 150°C
Storage Temperature.................................................................................... -65C to 150°C
Lead Temperature...................................................................................................... 300°C
Note 1: Exceeding these ratings could cause damage to the device. All voltages are with respect to
Ground. Currents are positive into, negative out of specified terminal.
SC
3-Pin Plastic Package
(PC Mounted)
220°C/W
Thermal Resistance – Junction to Ambient,
θJA
(Non-PC Mounted) 410°C/W
SE
5-Pin Plastic Package
(PC Mounted)
220°C/W
Thermal Resistance – Junction to Ambient,
θJA
(Non-PC Mounted) 410°C/W
LP
3-Pin Plastic Package
Thermal Resistance – Junction to Ambient,
θJA
156°C/W
Junction Temperature Calculation: TJ = TA + (PD x θJA).
The
θ
JA numbers are guidelines for the thermal performance of the device/pc-board
system. All of the above assume no ambient airflow.
AN O D E
RE F
CA TH O D E
1
2
3
SC PACKAGE – 3-PIN
ANO D E
REF
N.C.
CAT H O D E
N.C.
1
2
34
5
N.C. - No Inte rnal Connection
SE PACKAGE – 5-PIN
3. C ATHO DE
2. A NODE
1. R EF
LP PACKAGE – 3-PIN
(All Views Top View)
+
-
V
RE F
Ref(R)
A node(A )
C athode (K )
Figure 1 – Simplified Block Diagram
PP
AA
CC
KK
AA
GG
EE
DD
AA
TT
AA
相關PDF資料 |
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|---|---|
| LX432CSET | 1-OUTPUT TWO TERM VOLTAGE REFERENCE, 1.24 V, PDSO5 |
| LX432CSCT | 1-OUTPUT TWO TERM VOLTAGE REFERENCE, 1.24 V, PDSO3 |
| LX432ISE | 1-OUTPUT TWO TERM VOLTAGE REFERENCE, PDSO5 |
| LX432CLP | 1-OUTPUT TWO TERM VOLTAGE REFERENCE, PBCY3 |
| LX432ILP | 1-OUTPUT TWO TERM VOLTAGE REFERENCE, PBCY3 |
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