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參數(shù)資料
| 型號： | LVC11 |
| 廠商： | NXP Semiconductors N.V. |
| 英文描述： | Triple 3-input AND gate |
| 中文描述： | 3個(gè)三輸入與非門 |
| 文件頁數(shù)： | 2/10頁 |
| 文件大小： | 87K |
| 代理商： | LVC11 |
Philips Semiconductors
Product specification
74LVC11
Triple 3-input AND gate
2
1998 Apr 28
853-2060 19308
FEATURES
Wide supply voltage range of 1.2 V to 3.6 V
In accordance with JEDEC standard no. 8-1A.
Inputs accept voltages up to 5.5 V
CMOS low power consumption
Direct interface with TTL levels
Output capability: standard
I
CC
category: SSI
DESCRIPTION
The 74LVC11 is a high-performance, low power, low-voltage Si-gate
CMOS device and superior to most advanced CMOS compatible
TTL families.
The 74LVC11 provides the 3-input AND function.
QUICK REFERENCE DATA
GND = 0 V; T
amb
= 25
°
C; t
r
= t
f
SYMBOL
2.5 ns
PARAMETER
CONDITIONS
TYPICAL
UNIT
t
PHL
/t
PLH
Propagation delay
nA, nB, nC to nY
C
L
= 50 pF;
V
CC
= 3.3 V
3.7
ns
C
I
C
PD
Input capacitance
5.0
pF
Power dissipation capacitance per gate
Notes 1 and 2
26
pF
NOTES:
1. C
PD
is used to determine the dynamic power dissipation (P
D
in
μ
W)
P
D
= C
PD
×
V
CC2
×
f
i
(C
L
×
V
CC2
×
f
o
) where:
f
i
= input frequency in MHz; C
L
= output load capacity in pF;
f
o
= output frequency in MHz; V
= supply voltage in V;
(C
L
×
V
CC2
×
f
o
) = sum of the outputs.
2. The condition is V
I
= GND to V
CC.
ORDERING INFORMATION
PACKAGES
14-Pin Plastic SO
14-Pin Plastic SSOP Type II
14-Pin Plastic TSSOP Type I
TEMPERATURE RANGE
–40
°
C to +85
°
C
–40
°
C to +85
°
C
–40
°
C to +85
°
C
OUTSIDE NORTH AMERICA
74LVC11 D
74LVC11 DB
74LVC11 PW
NORTH AMERICA
74LVC11 D
74LVC11 DB
74LVC11PW DH
DWG NUMBER
SOT108-1
SOT337-1
SOT402-1
PIN CONFIGURATION
SV00416
1
2
3
4
5
6
7
1A
1B
2A
2B
2C
2Y
GND
VCC
1C
1Y
3C
3B
3A
3Y
14
13
12
11
10
9
8
LOGIC SYMBOL (IEEE/IEC)
SV00439
5
1
2
12
4
6
8
9
10
11
13
&
&
&
3
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