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參數(shù)資料
| 型號： | LV5040V |
| 元件分類： | 穩(wěn)壓器 |
| 英文描述： | 2 A DUAL SWITCHING CONTROLLER, 340 kHz SWITCHING FREQ-MAX, PDSO30 |
| 封裝： | 0.275 INCH, SSOP-30 |
| 文件頁數(shù)： | 7/7頁 |
| 文件大?。?/td> | 378K |
| 代理商： | LV5040V |
LV5040V
PS No.A0357-7/7
Specifications of any and all SANYO Semiconductor products described or contained herein stipulate the
performance, characteristics, and functions of the described products in the independent state, and are
not guarantees of the performance, characteristics, and functions of the described products as mounted
in the customer's products or equipment. To verify symptoms and states that cannot be evaluated in an
independent device, the customer should always evaluate and test devices mounted in the customer's
products or equipment.
SANYO Semiconductor Co., Ltd. strives to supply high-quality high-reliability products. However, any
and all semiconductor products fail with some probability. It is possible that these probabilistic failures
could give rise to accidents or events that could endanger human lives, that could give rise to smoke or
fire, or that could cause damage to other property. When designing equipment, adopt safety measures
so that these kinds of accidents or events cannot occur. Such measures include but are not limited to
protective circuits and error prevention circuits for safe design, redundant design, and structural design.
In the event that any or all SANYO Semiconductor products (including technical data,services) described
or contained herein are controlled under any of applicable local export control laws and regulations, such
products must not be exported without obtaining the export license from the authorities concerned in
accordance with the above law.
No part of this publication may be reproduced or transmitted in any form or by any means, electronic or
mechanical, including photocopying and recording, or any information storage or retrieval system, or
otherwise, without the prior written permission of SANYO Semiconductor Co., Ltd.
Any and all information described or contained herein are subject to change without notice due to
product/technology improvement, etc. When designing equipment, refer to the "Delivery Specification"
for the SANYO Semiconductor product that you intend to use.
Information (including circuit diagrams and circuit parameters) herein is for example only; it is not
guaranteed for volume production. SANYO Semiconductor believes information herein is accurate and
reliable, but no guarantees are made or implied regarding its use or any infringements of intellectual
property rights or other rights of third parties.
Continued from preceding page.
Pin No.
Pin
Function
18
SS
Soft start function capacitor connection.
After the power-on reset (POR) is cleared and the TD pin voltage exceeds 2.4V, this capacitor is charged by a 10
A
internal constant current supply from the SS pin. This pin is connected to the transconductance amplifier's noninverting (
+)
input, and the ramp waveform of the SS pin is reflected in the ramped-up output waveform. After the UV_DELAY when the
overvoltage protection function operates and when the thermal protection circuit operates, this capacitor is discharged by
the SS pin.
19
PGOOD
Channel 1 and channel 2 common power good pin.
An IC internal 15V MOSFET open drain is connected to this pin. This pin goes to the low level when either the channel 1
or channel 2 output voltage exceeds the range from -20% to +11% of the set voltage. This level has a roughly 1.5%
hysteresis on the -10% side.
20
KS2
Channel 2 internal current detection amplifier noninverting (
+) input.
21
ILIM2
Channel 2 overcurrent detection trip point setting.
22
FB2
Channel 2 feedback input.
23
COMP2
Channel 2 phase compensation.
24
SGND
IC system ground.
The reference voltage is generated referenced to this pin. The system ground must be connected to this pin.
25
RSNS2
Channel 2 internal current detection amplifier inverting (
) input and overcurrent detection comparator input.
26
CBOOT2
Channel 2 bootstrap capacitor connection.
27
SW2
This pin is connected to the channel 2 switching node.
28
HDRV2
Channel 2 external high side MOSFET gate drive.
29
LDRV2
Channel 2 external low side MOSFET gate drive.
30
PGND
Power system ground. The system ground must be connected to this pin.
This catalog provides information as of November, 2006. Specifications and information herein are subject
to change without notice.
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