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參數(shù)資料
| 型號(hào)： | LV4912GP-TE-L-E |
| 廠商： | ON Semiconductor |
| 文件頁(yè)數(shù)： | 9/11頁(yè) |
| 文件大?。?/td> | 0K |
| 描述： | IC AMP AUDIO CLASS D BTL 24VCT |
| 標(biāo)準(zhǔn)包裝： | 2,000 |
| 類(lèi)型： | D 類(lèi) |
| 輸出類(lèi)型： | 1-通道（單聲道） |
| 在某負(fù)載時(shí)最大輸出功率 x 通道數(shù)量： | 2W x 1 @ 4 歐姆 |
| 電源電壓： | 2.7 V ~ 5.5 V |
| 特點(diǎn)： | 靜音，短路和熱保護(hù)，待機(jī) |
| 安裝類(lèi)型： | 表面貼裝 |
| 供應(yīng)商設(shè)備封裝： | 24-VCT（3.5x3.5） |
| 封裝/外殼： | 24-WFQFN |
| 包裝： | 帶卷 (TR) |
LV4912GP
No.A1173-7/11
Description functions
1. System Standby
Each bias can be turned on/off by switching the STBY pin (pin 14) into high or low. The bias is turned off when the
STBY pin is low. Conversely, the bias is turned on when the STBY pin is high.
STBY pin (pin 14)
Bias condition
High
ON
Low
OFF
2. Mute Function
The mute of the output and reduction of power-on popping noise are mainly performed by the use of this function. By
switching between high and low on the MUTE pin (pin 13), the output can be muted. The MUTE pin enters the mute
mode (PWM output stops) when the MUTE pin is low. Also the MUTE pin enters the operation mode (normal
operations) when the MUTE pin is high.
MUTE pin (pin 13)
Conditions
High
Operation mode
Low
Mute mode
We recommend the following sequence for reduction of the popping noise when power is on/off. Also, we recommend
the following ON Time and OFF Time when P.4 the application circuit is used.
(1) Power On sequence
The ON Time should secure more than 150msec for reduction of the popping noise.
ON Time
STBY
MUTE
MUTECAP
Output pin
Internal power
supply
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