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參數(shù)資料
| 型號： | LTC6991HDCB#TRPBF |
| 廠商： | Linear Technology |
| 文件頁數(shù)： | 8/24頁 |
| 文件大小： | 0K |
| 描述： | IC OSC SILICON 977HZ 6-DFN |
| 產(chǎn)品培訓模塊： | TimerBlox Family Timing Devices |
| 特色產(chǎn)品： | TimerBlox? |
| 標準包裝： | 2,500 |
| 系列： | TimerBlox® |
| 類型： | 振蕩器 - 硅 |
| 頻率： | 29.1µHz ~ 977Hz |
| 電源電壓： | 2.25 V ~ 5.5 V |
| 電流 - 電源： | 135µA |
| 工作溫度： | -40°C ~ 125°C |
| 封裝/外殼： | 6-WFDFN 裸露焊盤 |
| 包裝： | 帶卷 (TR) |
| 供應商設(shè)備封裝： | 6-DFN-EP（2x3） |
| 安裝類型： | 表面貼裝 |
| 配用： | DC1562A-B-ND - BOARD EVAL LTC6991 |
LTC6991
16
6991fb
Self-Resetting Circuits
The RST pin has hysteresis to accommodate slow-changing
input voltages. Furthermore, the trip points are proportional
to the supply voltage (see Note 6 and the RST Threshold
Voltage vs Supply Voltage curve in Typical Performance
Characteristics). This allows an RC time constant at the
RST input to generate a delay that is nearly independent
of the supply voltage.
A simple application of this technique allows the LTC6991
output to reset itself, producing a well-controlled pulse
once each cycle. Figures 13a and 13b show circuits that
produce approximately 1μs pulses once a minute. The
only difference is in the POL bit setting, which controls
whether the pulse is positive or negative.
Voltage Controlled Frequency
With one additional resistor, the LTC6991 output frequency
can be manipulated by an external voltage. As shown in
Figure 14, voltage VCTRL sources/sinks a current through
RVCO to vary the ISET current, which in turn modulates the
output frequency as described in Equation (3).
f
MHz
k
NR
R
V
OUT
DIV
VCO
SET
CTRL
S
=+
150
1024
1
Ω
E
ET
(3)
Digital Frequency Control
The control voltage can be generated by a DAC (digital-
to-analog converter), resulting in a digitally-controlled
frequency. Many DACs allow for the use of an external
reference. If such a DAC is used to provide the VCTRL
voltage, the VSET dependency can be eliminated by buffer-
ing VSET and using it as the DAC’s reference voltage, as
shown in Figure 15. The DAC’s output voltage now tracks
any VSET variation and eliminates it as an error source.
The SET pin cannot be tied directly to the reference input
of the DAC because the current drawn by the DAC’s REF
input would affect the frequency.
ISET Extremes (Master Oscillator Frequency Extremes)
When operating with ISET outside of the recommended
1.25μA to 20μA range, the master oscillator operates
outside of the 62.5kHz to 1MHz range in which it is most
accurate.
APPLICATIONS INFORMATION
LTC6991
2.25V TO 5.5V
0.1μF
OUT
R1
1M
R2
392k
RSET
715k
RST
GND
SET
OUT
V+
DIV
CPW
470pF
RPW
2.26k
6991 F13a
60 SECONDS
1μs PULSE WIDTH
VRST(RISING)
V+
tPULSE = –RPW CPW In
tPULSE ≈ –2.26kΩ 470pF In(1 – 0.61)
tPULSE ≈ 1μs
1–
LTC6991
2.25V TO 5.5V
0.1μF
6991 F13b
OUT
R1
392k
R2
1M
60 SECONDS
0.9μs PULSE WIDTH
VRST(FALLING)
V+
tPULSE = –RPW CPW In
tPULSE ≈ –2.26kΩ 470pF In(0.43)
tPULSE ≈ 0.9μs
RSET
715k
RST
GND
SET
OUT
V+
DIV
CPW
470pF
RPW
2.26k
6991 F14
LTC6991
RST
GND
SET
OUT
V+
DIV
R1
C1
0.1μF
R2
RSET
RVCO
VCTRL
V+
Figure 13a. Self-Resetting Circuit (DIVCODE = 4)
Figure 13b. Self-Resetting Circuit (DIVCODE = 11)
Figure 14. Voltage-Controlled Oscillator
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