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參數(shù)資料
| 型號： | LTC6991HDCB#TRMPBF |
| 廠商： | Linear Technology |
| 文件頁數(shù)： | 10/24頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC OSC SILICON 977HZ 6-DFN |
| 產(chǎn)品培訓(xùn)模塊： | TimerBlox Family Timing Devices |
| 特色產(chǎn)品： | TimerBlox? |
| 標(biāo)準(zhǔn)包裝： | 500 |
| 系列： | TimerBlox® |
| 類型： | 振蕩器 - 硅 |
| 頻率： | 29.1µHz ~ 977Hz |
| 電源電壓： | 2.25 V ~ 5.5 V |
| 電流 - 電源： | 135µA |
| 工作溫度： | -40°C ~ 125°C |
| 封裝/外殼： | 6-WFDFN 裸露焊盤 |
| 包裝： | 帶卷 (TR) |
| 供應(yīng)商設(shè)備封裝： | 6-DFN-EP（2x3） |
| 安裝類型： | 表面貼裝 |
| 配用： | DC1562A-B-ND - BOARD EVAL LTC6991 |
LTC6991
18
6991fb
1. Connect the bypass capacitor, C1, directly to the V+ and
GND pins using a low inductance path. The connection
from C1 to the V+ pin is easily done directly on the top
layer. For the DFN package, C1’s connection to GND is
also simply done on the top layer. For the TSOT-23, OUT
can be routed through the C1 pads to allow a good C1
GND connection. If the PCB design rules do not allow
that, C1’s GND connection can be accomplished through
multiple vias to the ground plane. Multiple vias for both
the GND pin connection to the ground plane and the
C1 connection to the ground plane are recommended
to minimize the inductance. Capacitor C1 should be a
0.1μF ceramic capacitor.
2. Place all passive components on the top side of the
board. This minimizes trace inductance.
3. Place RSET as close as possible to the SET pin and
make a direct, short connection. The SET pin is a
current summing node and currents injected into this
pin directly modulate the operating frequency. Having
a short connection minimizes the exposure to signal
pickup.
4. Connect RSET directly to the GND pin. Using a long path
or vias to the ground plane will not have a significant
affect on accuracy, but a direct, short connection is
recommended and easy to apply.
5. Use a ground trace to shield the SET pin. This provides
another layer of protection from radiated signals.
6. Place R1 and R2 close to the DIV pin. A direct, short
connection to the DIV pin minimizes the external signal
coupling.
6991 F18
LTC6991
RST
GND
SET
OUT
V+
DIV
C1
0.1μF
R1
R2
RSET
V+
DIV
SET
OUT
GND
RST
C1
R1
R2
V+
RSET
DFN PACKAGE
RST
GND
SET
OUT
V+
DIV
R2
V+
RSET
TSOT-23 PACKAGE
R1
C1
Figure 18. Supply Bypassing and PCB Layout
APPLICATIONS INFORMATION
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| LTC6991HS6#PBF | 制造商:Linear Technology 功能描述:TIMER BLOX RESETTABLE, LOW FREQUENCY OSCILLATOR |
| LTC6991HS6#TRMPBF | 功能描述:IC OSC SILICON 977HZ TSOT23-6 RoHS:是 類別:集成電路 (IC) >> 時(shí)鐘/計(jì)時(shí) - 可編程計(jì)時(shí)器和振蕩器 系列:TimerBlox® 標(biāo)準(zhǔn)包裝:3,000 系列:- 類型:振蕩器 - 晶體 計(jì)數(shù):- 頻率:- 電源電壓:2.3 V ~ 5.5 V 電流 - 電源:1.07mA 工作溫度:-30°C ~ 80°C 封裝/外殼:SOT-665 包裝:帶卷 (TR) 供應(yīng)商設(shè)備封裝:SS迷你型-5D 安裝類型:表面貼裝 其它名稱:AN8955SSMTXLTR |
| LTC6991HS6#TRPBF | 功能描述:IC OSC SILICON 977HZ TSOT23-6 RoHS:是 類別:集成電路 (IC) >> 時(shí)鐘/計(jì)時(shí) - 可編程計(jì)時(shí)器和振蕩器 系列:TimerBlox® 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標(biāo)準(zhǔn)包裝:45 系列:- 類型:溫度 - 補(bǔ)償晶體振蕩器（TCXO） 計(jì)數(shù):- 頻率:25MHz 電源電壓:3.135 V ~ 3.465 V 電流 - 電源:1.5mA 工作溫度:-40°C ~ 85°C 封裝/外殼:16-SOIC（0.295"，7.50mm 寬） 包裝:管件 供應(yīng)商設(shè)備封裝:16-SOIC W 安裝類型:表面貼裝 |
| LTC6991HS6PBF | 制造商:LINER 制造商全稱:Linear Technology 功能描述:TimerBlox: Resettable, Low Frequency Oscillator |
| LTC6991IDCB#PBF | 制造商:Linear Technology 功能描述: |
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