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參數(shù)資料
| 型號： | LTC6081IDD#TRPBF |
| 廠商： | Linear Technology |
| 文件頁數(shù)： | 4/20頁 |
| 文件大小： | 0K |
| 描述： | IC AMP R-R DUAL I/O 10-DFN |
| 標(biāo)準(zhǔn)包裝： | 2,500 |
| 放大器類型： | 通用 |
| 電路數(shù)： | 2 |
| 輸出類型： | 滿擺幅 |
| 轉(zhuǎn)換速率： | 1 V/µs |
| 增益帶寬積： | 3.5MHz |
| 電流 - 輸入偏壓： | 0.2pA |
| 電壓 - 輸入偏移： | 70µV |
| 電流 - 電源： | 340µA |
| 電流 - 輸出 / 通道： | 24mA |
| 電壓 - 電源，單路/雙路(±)： | 2.7 V ~ 5.5 V |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 10-WFDFN 裸露焊盤 |
| 供應(yīng)商設(shè)備封裝： | 10-DFN-EP（3x3） |
| 包裝： | 帶卷 (TR) |
LTC6081/LTC6082
12
60812fd
For more information www.linear.com/LTC6081
PC Board Layout
Mechanical stress on a PC board and soldering-induced
stress can cause the VOS and VOS drift to shift. The DD
and DHC packages are more sensitive to stress. A simple
way to reduce the stress-related shifts is to mount the IC
near the short edge of the PC board, or in a corner. The
board edge acts as a stress boundary, or a region where
the flexure of the board is minimum. The package should
always be mounted so that the leads absorb the stress
applicaTions inForMaTion
Figure 2. Vertical Orientation of LTC6081DD with Slots
60812 F02
LONG DIMENSION
SLOTS
Simplified Schematic of the Amplifier
R1
R2
R3
V+
V–
R4
–
+
D8
D7
OUT
M8
M9
C1
C2
60812 SS
V+
V–
D5
D6
–
+
OUTPUT
CONTROL
M4
M6
A1
A2
M7
M5
I1
VBIAS
M1 M2
M3
–IN
V
V–
V+
V–
D3
D4
+IN
V–
M11
M10
1A
I2
V+
V–
D1
D2
SHDN
BIAS
GENERATION
NOTE: SHDN IS ONLY AVAILABLE
IN THE DFN10 PACKAGE
CLAMP
siMpliFieD scheMaTic
and not the package. The package is generally aligned
with the leads perpendicular to the long side of the PC
board (see Figure 2).
The most effective technique to relieve the PC board stress
is to cut slots in the board around the op amp. These slots
can be cut on three sides of the IC and the leads can exit on
the fourth side. Figure 2 shows the layout of a LTC6081DD
with slots at three sides.
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