參數(shù)資料
型號(hào)： LTC5583IUF#TRPBF
廠商： LINEAR TECHNOLOGY CORP
元件分類： 電源管理
英文描述： 2-CHANNEL POWER SUPPLY SUPPORT CKT, PQCC24
封裝： 4 X 4 MM, LEAD FREE, PLASTIC, MO-220WGGD-X, QFN-24
文件頁(yè)數(shù)： 18/28頁(yè)
文件大?。?/td> 1136K
代理商： LTC5583IUF#TRPBF
LTC5583
25
5583fa
APPLICATIONS INFORMATION
Difference Output: VODF
This voltage is equal to the difference of the two channels’
output voltages, plus a DC offset:
VODF = (VOA – VOB) + VOS
if INV voltage < 1V.
VODF = (VOB – VOA) + VOS
if INV voltage > 2V.
A simplified schematic of the VODF interface is shown in
Figure 14. The low 5Ω output impedance at this pin is due
to internal feedback circuitry.
A simplified schematic of the VOS pin interface is shown
in Figure 16. The output range of VODF is from 50mV to
VCC – 50mV; it cannot go below 50mV. If VOA – VOB is
negative (for INV = low), a positive offset voltage VOS is
needed. Similarly, if VOB – VOA is negative (for INV = high),
a positive offset voltage VOS is needed.
Figure 14. Simplified Schematic of the VODF Pin
Figure 15. Simplified Schematic of the INV Pin
Figure 16. Simplified Schematic of the VOS Pin
5583 F15
LTC5583
VCC
10k
INV
5583 F16
LTC5583
VCC
30k
VOS
* VOA IF INV = LOW
VOB IF INV = HIGH
*
5583 F14
LTC5583
15k
–
+
VCC
VODF
Supply Voltage Ramping
Fast ramping of the supply voltage can cause a current
glitch in the internal ESD protection circuits. Depending
on the supply inductance, this could result in a supply
voltage overshoot at initial turn-on that exceeds the maxi-
mum rating. A supply voltage ramp time of greater than
1ms is recommended. In case this voltage ramp time is
not controllable, a small (i.e. 1Ω) series resistor can be
inserted between VCC pin and the supply voltage source
to mitigate the problem and protect the IC. The R1 shown
in Figures 1 and 2 serves this purpose.
Figure 15 shows a simplified schematic of the INV pin
interface. INV determines the sign of the difference func-
tion at the VODF output.
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