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參數(shù)資料
| 型號： | LTC4264IDE#TRPBF |
| 廠商： | Linear Technology |
| 文件頁數(shù)： | 23/24頁 |
| 文件大小： | 0K |
| 描述： | IC CNTRLR PD INTERFACE 12-DFN |
| 標準包裝： | 2,500 |
| 控制器類型： | 以太網供電控制器（POE） |
| 接口： | IEEE 802.3af |
| 電流 - 電源： | 3mA |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 12-WFDFN 裸露焊盤 |
| 供應商設備封裝： | 12-DFN（4x3） |
| 包裝： | 帶卷 (TR) |
LTC4264
8
4264f
APPLICATIONS INFORMATION
4264 F02
SMAJ58A
0.1
F
Tx1
Rx1
Tx1
SMAJ58A
VEE
SENSE GATE OUT
VDD
AUTO
CMPD3003
10k
1k
0.1
F
0.25
IRLR3410
S1B
1/4
LTC4259A
DGND BYP
AGND
DETECT
3.3V
–54V
1
RJ45
CAT5
2
1
2
3
6
3
6
PSE
PD
RCLASS
VIN
PWRGD
VOUT
LTC4264
GND
DF1501S
DC/DC
CONVERTER
5
F
MIN
+
–
VOUT
GND
0.47
F
SMAJ58A
0.1
F
Tx2
Rx2
Tx2
VEE
SENSE GATE OUT
CMPD3003
10k
1k
0.25
IRLR3410
S1B
1/4
LTC4259A
DETECT
–54V
4
5
4
5
7
8
7
8
GND
0.47
F
0.1
F
SMAJ58A
RCLASS
VIN
PWRGD
VOUT
LTC4264
GND
DC/DC
CONVERTER
5
F
MIN
0.1
F
AGND
Figure 2. 4-Pair High Power PoE Gigabit Ethernet System Diagram
The LTC4264 is specically designed to implement the
front end of a high power PD for power-hungry PoE ap-
plications that must operate beyond the power limits of
IEEE 802.3af. LTC4264 uses a precision, dual current limit
that keeps inrush below IEEE 803.2af levels to ensure
interoperability with any PSE. After inrush is complete,
the LTC4264 input current limit switches to the ILIMIT_HIGH
level, using an onboard, 750mA power MOSFET. This al-
lows a PD (supplied by a custom PSE) to deliver power
above the IEEE 802.3af 12.95W maximum, sending up
to 35W to the PD load. The LTC4264 uses established
IEEE 802.3af detection and classication methods to
maintain compliance and includes an extended program-
mable Class 5 range for use in custom PoE applications.
The LTC4264 features both active-high and active-low
power good signaling for simplied interface to any DC/DC
converter. The SHDN pin on the LTC4264 can be used to
provide a seamless interface for external wall adapter or
other auxiliary power options. The ILIM_EN pin provides the
option to remove the high current limit, ILIMIT_HIGH. The
LTC4264 includes an onboard signature resistor, precision
UVLO, thermal overload protection and is available in a
thermally-enhanced 12-lead 4mm
× 3mm DFN package
for superior high current performance.
OPERATION
The LTC4264 high power PD interface controller has sev-
eral modes of operation depending on the applied input
voltage as shown in Figure 3 and summarized in Table 1.
These various modes satisfy the requirements dened
in the IEEE 802.3af specication. The input voltage is
applied to the VIN pin with reference to the GND pin and
is always negative.
Table 1. LTC4264 Operational Mode as a Function
of Input Voltage
INPUT VOLTAGE
LTC4264 MODE OF OPERATION
0V to –1.4V
Inactive
–1.5V to –10.1V
25k Signature Resistor Detection
–10.3V to –12.4V
Classication Load Current Ramps Up from 0% to
100%
–12.5V to UVLO*
Classication Load Current Active
UVLO* to –57V
Power Applied to PD Load
*UVLO includes hysteresis.
Rising input threshold
–38.9V
Falling input threshold
–30.6V
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| LTC4265CDE#PBF | 功能描述:IC CTRLR PD INTERFACE HP 12-DFN RoHS:是 類別:集成電路 (IC) >> PMIC - 熱交換 系列:- 標準包裝:50 系列:- 類型:熱交換控制器 應用:-48V 遠程電力系統(tǒng)，AdvancedTCA ? 系統(tǒng)，高可用性 內部開關:無 電流限制:可調 電源電壓:11.5 V ~ 14.5 V 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:10-TFSOP，10-MSOP（0.118"，3.00mm 寬） 供應商設備封裝:10-MSOP 包裝:管件 |
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