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參數(shù)資料
| 型號： | LTC4215IUFD#PBF |
| 廠商： | Linear Technology |
| 文件頁數(shù)： | 17/28頁 |
| 文件大?。?/td> | 265K |
| 描述： | IC CNTRLR HOT SWAP 24-QFN |
| 標(biāo)準(zhǔn)包裝： | 73 |
| 類型： | 熱交換控制器 |
| 應(yīng)用： | 通用 |
| 內(nèi)部開關(guān)： | 無 |
| 電源電壓： | 2.9 V ~ 15 V |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 24-WFQFN 裸露焊盤 |
| 供應(yīng)商設(shè)備封裝： | 24-QFN（5x4） |
| 包裝： | 管件 |
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LTC4215/LTC4215-2
17
4215fe
APPLICATIONS INFORMATION
pin low. The undervoltage lockout circuit has a 2約 lter
time after V
DD
drops below 2.74V . The UV pin reacts in
2約 to shut the GATE off, but it is recommended to add a
lter capacitor C
F
to prevent unwanted shutdown caused
by a transient. Eventually either the UV pin or undervoltage
lockout responds to bring the current under control before
the supply completely collapses.
Supply Transient Protection
The LTC4215 is safe from damage with supply voltages up
to 24V . However, spikes above 24V may damage the part.
During a short-circuit condition, large changes in current
owing through power supply traces may cause inductive
voltage spikes which exceed 24V . To minimize such spikes,
the power trace inductance should be minimized by using
wider traces or heavier trace plating. Also, a snubber circuit
dampens inductive voltage spikes. Build a snubber by using
a 100?resistor in series with a 0.1糉 capacitor between
V
DD
and GND. A surge suppressor, Z1 in Figure 1, at the
input can also prevent damage from voltage surges.
Design Example
As a design example, take the following speci cations:
V
IN
= 12V , I
MAX
= 5A, I
INRUSH
= 1A, dI/dt
INRUSH
= 10A/ms,
C
L
= 330糉 , V
UV(ON)
= 10.75V , V
OV(OFF)
= 14.0V , V
PWRGD(UP)
= 11.6V , and I
2
C ADDRESS = 1010011. This completed
design is shown in Figure 1.
Selection of the sense resistor, R
S
, is set by the overcurrent
threshold of 25mV:
R
mV
I
S
MAX
=
=
25
0 005
. ?/DIV>
The MOSFET is sized to handle the power dissipation dur-
ing inrush when output capacitor C
OUT
is being charged.
A method to determine power dissipation during inrush
is based on the principle that:
Energy in CL = Energy in Q1
This uses:
Energy in C
L
=
=
(
)( )
1
2
1
2
0 33
12
2
2
CV
mF
.
or 0.024 joules. Calculate the time it takes to charge up
C
OUT
:
t
C
V
I
mF
V
A
ms
STARTUP L
DD
INRUSH
=
=
=
"
.
"
0 33
12
1
4
The power dissipated in the MOSFET:
P
t
W
DISS
STARTUP
=
=
Energyin C
L
6
The SOA (safe operating area) curves of candidate MOSFETs
must be evaluated to ensure that the heat capacity of the
package tolerates 6W for 4ms. The SOA curves of the
Fairchild FDC653N provide for 2A at 12V (24W) for 10ms,
satisfying this requirement. Since the FDC653N has less
than 8糉 of gate capacitance and we are using a GATE
RC network, the short circuit stability of the current limit
should be checked and improved by adding a capacitor
from GATE to SOURCE if needed.
The inrush current is set to 1A using C1:
C C
I
I
C
mF
糀
A
or C
L
GATE
INRUSH
1
1 0 33
20
1
1 6
=
=
=
"
.
"
?nbsp ?/DIV>
.8 8nF
The inrush dI/dt is set to 10A/ms using C
SS
:
C
I
dI dt
A
s
R
糀
SS
SS
SENSE
=
?/DIV>
?/DIV>
?/DIV>
?/DIV>
?/DIV>
?/DIV>
=
/
" .
"
0 0375
1
10
100
000
0 0375
1
5
7 5
" .
"
.
m
nF
?/DIV>
=
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