參數(shù)資料
型號(hào): LTC3851AMPMSE-1#PBF
廠商: LINEAR TECHNOLOGY CORP
元件分類: 穩(wěn)壓器
英文描述: 0.05 A SWITCHING CONTROLLER, 810 kHz SWITCHING FREQ-MAX, PDSO16
封裝: LEAD FREE, PLASTIC, MSOP-16
文件頁數(shù): 17/30頁
文件大?。?/td> 0K
代理商: LTC3851AMPMSE-1#PBF
LTC3851A-1
24
3851a1fa
applicaTions inForMaTion
2. Does the VFB pin connect directly to the feedback resis-
tors? The resistive divider R1, R2 must be connected
between the (+) plate of COUT and signal ground. The
47pF to 100pF capacitor should be as close as possible
to the LTC3851A-1. Be careful locating the feedback
resistors too far away from the LTC3851A-1. The VFB
line should not be routed close to any other nodes with
high slew rates.
3. Are the SENSEand SENSE+ leads routed together
with minimum PC trace spacing? The filter capacitor
between SENSE+ and SENSEshould be as close as
possible to the LTC3851A-1. Ensure accurate current
sensing with Kelvin connections as shown in Figure 10.
Series resistance can be added to the SENSE lines to
increase noise rejection and to compensate for the ESL
of RSENSE.
4. Does the (+) terminal of CIN connect to the drain of
the topside MOSFET(s) as closely as possible? This
capacitor provides the AC current to the MOSFET(s).
5. Is the INTVCC decoupling capacitor connected closely
between INTVCC and GND? This capacitor carries the
MOSFETdriverpeakcurrents.Anadditional1μFceramic
capacitor placed immediately next to the INTVCC and
GND pins can help improve noise performance.
6. Keep the switching node (SW), top gate node (TG) and
boost node (BOOST) away from sensitive small-signal
nodes, especially from the voltage and current sensing
feedback pins. All of these nodes have very large and
fast moving signals and therefore should be kept on
the “output side” (Pin 9 to Pin 16) of the LTC3851A-1
and occupy minimum PC trace area.
PC Board Layout Debugging
It is helpful to use a DC-50MHz current probe to monitor
thecurrentintheinductorwhiletestingthecircuit.Monitor
the output switching node (SW pin) to synchronize the
oscilloscope to the internal oscillator and probe the actual
output voltage as well. Check for proper performance over
the operating voltage and current range expected in the
application. The frequency of operation should be main-
tained over the input voltage range down to dropout and
until the output load drops below the low current opera-
tion threshold—typically 10% of the maximum designed
current level in Burst Mode operation.
Thedutycyclepercentageshouldbemaintainedfromcycle
to cycle in a well designed, low noise PCB implementation.
Variation in the duty cycle at a subharmonic rate can sug-
gest noise pick-up at the current or voltage sensing inputs
or inadequate loop compensation. Overcompensation of
the loop can be used to tame a poor PC layout if regulator
bandwidth optimization is not required.
Reduce VIN from its nominal level to verify operation
of the regulator in dropout. Check the operation of the
undervoltage lockout circuit by further lowering VIN while
monitoring the outputs to verify operation.
Investigate whether any problems exist only at higher out-
put currents or only at higher input voltages. If problems
coincide with high input voltages and low output currents,
look for capacitive coupling between the BOOST, SW, TG
and possibly BG connections and the sensitive voltage
and current pins. The capacitor placed across the current
sensing pins needs to be placed immediately adjacent to
the pins of the IC. This capacitor helps to minimize the
effects of differential noise injection due to high frequency
capacitive coupling. If problems are encountered with
high current output loading at lower input voltages, look
for inductive coupling between CIN, the Schottky and the
top MOSFET to the sensitive current and voltage sens-
ing traces. In addition, investigate common ground path
voltage pickup between these components and the GND
pin of the IC.
Figure 10. Kelvin Sensing RSENSE
SENSE+ SENSE
HIGH CURRENT PATH
3851A1 F10
CURRENT SENSE
RESISTOR
(RSENSE)
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