參數(shù)資料
型號: LTC3833EUDC#PBF
廠商: LINEAR TECHNOLOGY CORP
元件分類: 穩(wěn)壓器
英文描述: SWITCHING CONTROLLER, 2000 kHz SWITCHING FREQ-MAX, PQCC20
封裝: 3 X 3 MM, LEAD FREE, PLASTIC, QFN-20
文件頁數(shù): 35/36頁
文件大?。?/td> 513K
代理商: LTC3833EUDC#PBF
LTC3833
8
3833f
PIN FUNCTIONS
PGOOD (Pin 1/Pin 17): Power Good Indicator Output.
This open-drain logic output is pulled to ground when
the output voltage is outside of a ±7.5% window around
the regulation point.
SENSE+ (Pin 2/Pin 18): Differential Current Sensing (+)
Input. For RSENSEcurrentsensing,Kelvin(4-wire)connect
SENSE+ and SENSEpins across the sense resistor. For
DCR sensing, Kelvin connect SENSE+ and SENSEpins
across the sense filter capacitor.
SENSE(Pin 3/Pin 19): Differential Current Sensing (–)
Input. For RSENSEcurrentsensing,Kelvin(4-wire)connect
SENSE+ and SENSEpins across the sense resistor. For
DCR sensing, Kelvin connect SENSE+ and SENSEpins
across the sense filter capacitor.
VOUT (Pin 4/Pin 20): Output voltage sense for adjusting
the TG on-time for constant frequency operation. Tying
this pin to the local output (instead of remote output)
is recommended for most applications. This pin can be
programmed as needed for achieving the steady-state
on-time required for constant frequency operation.
VOSNS– (Pin 5/Pin 1): Differential Output Sensing (–)
Input. Connect this pin to the negative terminal of the
output capacitor. There is a bias current of 35A (typical)
flowing out of this pin.
VOSNS+(Pin6/Pin2):DifferentialOutputSensing(+)Input.
Connect this pin to the feedback resistor divider between
the positive and negative output capacitor terminals. In
nominal operation the LTC3833 will regulate the differen-
tial output voltage which is divided down to 0.6V by the
feedback resistor divider.
TRACK/SS (Pin 7/Pin 3): External Tracking and Soft-Start
Input.TheLTC3833regulatesthedifferentialfeedbackvolt-
age (VOSNS+VOSNS–)tothesmallerof0.6Vorthevoltage
on the TRACK/SS pin. An internal 1.0μA pull-up current
source is connected to this pin. A capacitor to ground at
this pin sets the ramp time to the final regulated output
voltage. Alternatively, another voltage supply connected
through a resistor divider to this pin allows the output to
track the other supply during start-up.
ITH (Pin 8/Pin 4): Current Control Voltage and Switch-
ing Regulator Compensation Point. The current sense
threshold increases with this control voltage which ranges
from 0V to 2.4V.
VRNG (Pin 9/Pin 5): Current Sense Voltage Range Input.
ThemaximumallowedsensevoltagebetweenSENSE+and
SENSEis equal to 0.05 VRNG. If VRNG is tied to SGND,
the device operates with a maximum sense voltage of
30mV. If VRNG is tied to INTVCC, the device operates with
a maximum sense voltage of 50mV.
RT(Pin10/Pin6):SwitchingFrequencyProgrammingPin.
Connect an external resistor from RT to signal ground to
program the switching frequency between 200kHz and
2MHz. An external clock applied to MODE/PLLIN must
be within ±30% of this free-running frequency to ensure
frequency lock.
RUN (Pin 11/Pin 7): Digital Run Control Input. RUN self
biases high with an internal 1.3A pull-up. Forcing RUN
below 1.2V turns off TG and BG. Taking RUN below 0.75V
shutsdownallbiasandplacestheLTC3833intomicropower
shutdown mode of approximately 15μA.
EXTVCC (Pin 12/Pin 8): External VCC Input. When EXT-
VCC exceeds 4.6V, an internal switch connects this pin to
INTVCC and shuts down the internal regulator so that the
controller and gate drive power is drawn from EXTVCC.
EXTVCC should not exceed VIN.
MODE/PLLIN (Pin 13/Pin 9): External Clock Synchroniza-
tion Input and/or Forced Continuous Mode Input. When an
external clock is applied to this pin, the rising TG signal will
be synchronized with the rising edge of the external clock.
Additionally,thispindeterminesoperationunderlightload
conditions.WheneitheraclockinputisdetectedorMODE/
PLLINistiedtoINTVCC,forcedcontinuousmodeoperation
is selected. Tying this pin to SGND allows discontinuous
pulse-skipping mode operation at light loads.
(FE/UDC)
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