參數(shù)資料
型號: LTC3634EUFD#PBF
廠商: LINEAR TECHNOLOGY CORP
元件分類: 穩(wěn)壓器
英文描述: 5.5 A DUAL SWITCHING CONTROLLER, 4600 kHz SWITCHING FREQ-MAX, PQCC28
封裝: 4 X 5 MM, LEAD FREE, PLASTIC, MO-220, QFN-28
文件頁數(shù): 10/28頁
文件大?。?/td> 359K
代理商: LTC3634EUFD#PBF
LTC3634
18
3634f
applicaTions inForMaTion
Minimum Off-Time/On-Time Considerations
The minimum off-time is the smallest amount of time that
the LTC3634 can turn on the bottom power MOSFET, trip
the current comparator and turn the power MOSFET back
off. This time is typically 40ns. For the controlled on-time
control architecture, the minimum off-time limit imposes
a maximum duty cycle of:
DCMAX = 1– (f tOFF(MIN))
where f is the switching frequency and tOFF(MIN) is the
minimumoff-time.Ifthemaximumdutycycleissurpassed,
due to a decreasing input voltage for example, the output
will drop out of regulation. The minimum input voltage to
avoid this dropout condition is:
VIN(MIN) =
VOUT
1
f tOFF(MIN)
(
)
Conversely, the minimum on-time is the smallest dura-
tion of time in which the top power MOSFET can be in
its ON state. This time is typically 20ns. In continuous
mode operation, the minimum on-time limit imposes a
minimum duty cycle of:
DCMIN = (f tON(MIN))
where tON(MIN) is the minimum on-time. As the equation
shows, reducing the operating frequency will alleviate the
minimum duty cycle constraint.
When the regulator output is sinking current, the effective
minimum on-time of the converter will be increased by the
non-overlap time of the power MOSFETs (or the “dead-
time”) during each SW node transition. This “dead-time”
is nominally 15ns, so when sinking current, the minimum
on-time is effectively 15ns + 15ns + 20ns = 50ns.
Iftheminimumon-timeconstraintisviolated,theconverter
will automatically reduce its own switching frequency in
order to maintain output regulation. Once the converter
reduces its switching frequency, the phase information
is lost and the two channels will switch asynchronously.
Furthermore, the regulator may need to be compensated
more conservatively due to the lower switching frequency.
MODE/SYNC Operation
The MODE/SYNC pin is a multipurpose pin allowing both
mode selection and operating frequency synchronization.
Floating this pin or connecting it to INTVCC enables Burst
Mode operation on channel 1 for superior efficiency at
light load currents at the expense of slightly higher out-
put voltage ripple. When the MODE/SYNC pin is tied to
ground, forced continuous mode operation is selected,
creating the lowest fixed output ripple at the expense of
light load efficiency.
The LTC3634 will detect the presence of the external
clock signal on the MODE/SYNC pin and synchronize the
internal oscillator to the phase and frequency of the in-
coming clock. The presence of an external clock will place
both regulators into forced continuous mode operation.
Although the RT resistor is not strictly necessary when
synchronizing to an external clock, it is recommended to
use a RT resistor that matches the nominal external clock
frequency in order to keep the switching regulator biased
correctly whenever the external clock signal is suddenly
removed or reapplied.
Channel 1 Output Voltage Tracking and Soft-Start
The LTC3634 allows the user to control the output voltage
ramp rate of channel 1 by means of the TRACKSS pin.
From 0 to 0.6V, the TRACKSS voltage will override the
internal 0.6V reference input to the error amplifier, thus
regulating the feedback voltage to that of the TRACKSS
pin. When TRACKSS is above 0.6V, tracking is disabled
and the feedback voltage will regulate to the internal
reference voltage.
The voltage at the TRACKSS pin may be driven from an
external source, or alternatively, the user may leverage
the internal 1.4μA pull-up current source to implement
a soft-start function by connecting an external capacitor
(CSS) from the TRACKSS pin to ground. The relationship
between output rise time and TRACKSS capacitance is
given by:
tSS = 430000Ω CSS
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