![](http://datasheet.mmic.net.cn/70000/LTC3496IUFD-TRPBF_datasheet_2357669/LTC3496IUFD-TRPBF_7.png)
LT3496
7
3496f
APPLICATIONS INFORMATION
Operation
The LT3496 uses a xed frequency, current mode control
scheme to provide excellent line and load regulation. Op-
eration can be best understood by referring to the Block
Diagram in Figure 1. The oscillator, ramp generator, refer-
ence, internal regulator and UVLO are shared among the
three converters. The control circuitry, power switch etc.,
are replicated for each of the three converters. Figure 1
shows the shared circuits and only converter 1 circuits.
If the
SHDN pin is tied to ground, the LT3496 is shut
down and draws minimal current from VIN. If the SHDN
pin exceeds 1.5V, the internal bias circuits turn on. The
switching regulators start to operate when their respective
PWM signal goes high.
The main control loop can be understood by following
the operation of converter 1. The start of each oscillator
cycle sets the SR latch, A3, and turns on power switch
Q1. The signal at the noninverting input (SLOPE node)
of the PWM comparator A2 is proportional to the sum
of the switch current and oscillator ramp. When SLOPE
exceeds VC (the output of the error amplier A1), A2 resets
the latch and turns off the power switch Q1 through A4
and A5. In this manner, A10 and A2 set the correct peak
current level to keep the output in regulation. Amplier
A8 has two noninverting inputs, one from the 1V internal
voltage reference and the other one from the CTRL1 pin.
Whichever input is lower takes precedence. A8, Q3 and R1
force V1, the voltage across R1, to be one tenth of either
1V or the voltage of CTRL1 pin, whichever is lower. VSENSE
is the voltage across the sensing resistor, RSENSE, which is
connected in series with the LEDs. VSENSE is compared to
V1 by A1. If VSENSE is higher than V1, the output of A1 will
decrease, thus reducing the amount of current delivered to
LEDs. In this manner the current sensing voltage VSENSE
is regulated to V1.
Converter 2 and converter 3 operate identical to con-
verter 1.
PWM Dimming Control
LED1 can be dimmed with pulse width modulation us-
ing the PWM1 pin and an external P-channel MOSFET,
M1. If the PWM1 pin is pulled high, M1 is turned on by
internal driver A7 and converter 1 operates nominally. If
the PWM1 pin is pulled low, Q1 is turned off. Converter 1
stops operating, M1 is turned off, disconnects LED1 and
stops current draw from output capacitor C2. The VC1
pin is also disconnected from the internal circuitry and
draws minimal current from the compensation capacitor
CC. The VC1 pin and the output capacitor store the state
of the LED1 current until PWM1 is pulled up again. This
leads to a highly linear relationship between pulse width
and output light, and allows for a large and accurate dim-
ming range. To optimize the PWM control of all the three
channels, the rising edge of all the three PWM signals
should be synchronized.
In the applications where high dimming ratio is not required,
the external MOSFET M1 can be omitted to reduce cost.
In these conditions, TG1 should be left open.
The PWM dimming range can be further increased by using
CTRL1 pin to linearly adjust the current sense threshold
during the PWM1 high state.
Open-LED Protection
The LT3496 has open-LED protection for all the three
converters. As shown in Figure 1, the OVP1 pin receives
the output voltage (the voltage across the output capacitor)
feedback signal from an external resistor divider. OVP1
voltage is compared with a 1V internal voltage reference by
comparator A6. In the event the LED string is disconnected
or fails open, converter 1 output voltage will increase, caus-
ing OVP1 voltage to increase. When OVP1 voltage exceeds
1V, the power switch Q1 will turn off, and cause the output
voltage to decrease. Eventually, OVP1 will be regulated to
1V and the output voltage will be limited. In the event one
of the converters has an open-LED protection, the other
converters will continue functioning properly.