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參數(shù)資料
| 型號： | LTC3412IFE#TR |
| 廠商： | LINEAR TECHNOLOGY CORP |
| 元件分類： | 穩(wěn)壓器 |
| 英文描述： | 6.5 A SWITCHING REGULATOR, 4000 kHz SWITCHING FREQ-MAX, PDSO16 |
| 封裝： | 4.40 MM, PLASTIC, TSSOP-16 |
| 文件頁數(shù)： | 5/20頁 |
| 文件大?。?/td> | 214K |
| 代理商： | LTC3412IFE#TR |
LTC3412
13
3412fb
The junction temperature, TJ, is given by:
TJ = TA + TR
where TA is the ambient temperature.
As an example, consider the LTC3412 in dropout at an
input voltage of 3.3V, a load current of 2.5A and an
ambient temperature of 70°C. From the typical perfor-
mance graph of switch resistance, the RDS(ON) of the P-
channel switch at 70°C is approximately 97mΩ. There-
fore, power dissipated by the part is:
PD = (ILOAD2)(RDS(ON)) = (2.5A)2(97mΩ) = 0.61W
For the TSSOP package, the θJA is 37.6°C/W. Thus the
junction temperature of the regulator is:
TJ = 70°C + (0.61W)(37.6°C/W) = 93°C
which is below the maximum junction temperature of
125°C.
Note that at higher supply voltages, the junction tempera-
ture is lower due to reduced switch resistance (RDS(ON)).
Checking Transient Response
The regulator loop response can be checked by looking at
the load transient response. Switching regulators take
several cycles to respond to a step in load current. When
a load step occurs, VOUT immediately shifts by an amount
equal to ΔILOAD(ESR), where ESR is the effective series
resistance of COUT. ΔILOAD also begins to charge or
discharge COUT generating a feedback error signal used by
the regulator to return VOUT to its steady-state value.
During this recovery time, VOUT can be monitored for
overshoot or ringing that would indicate a stability prob-
lem. The ITH pin external components and output capaci-
tor shown in Figure 1 will provide adequate compensation
for most applications.
Design Example
As a design example, consider using the LTC3412 in an
application with the following specifications: VIN = 2.7V to
4.2V, VOUT = 2.5V, IOUT(MAX) = 2.5A, IOUT(MIN) = 10mA, f
= 1MHz. Because efficiency is important at both high and
low load current, Burst Mode operation will be utilized.
First, calculate the timing resistor:
Rk
k
OSC =
=
323 10
110
10
313
11
6
.
Use a standard value of 309k. Next, calculate the inductor
value for about 40% ripple current at maximum VIN:
L
V
MHz A
V
H
=
=
μ
25
11
1
25
42
101
.
()( )
.
Using a 1μH inductor, results in a maximum ripple current
of:
Δ =
μ
=
I
V
MHz
H
V
A
L
25
11
1
25
42
101
.
()(
)
.
COUT will be selected based on the ESR that is required to
satisfy the output voltage ripple requirement and the bulk
capacitance needed for loop stability. In this application,
two tantalum capacitors will be used to provide the bulk
capacitance and a ceramic capacitor in parallel to lower the
total effective ESR. For this design, two 100μF tantalum
capacitors in parallel with a 10μF ceramic capacitor will be
used. CIN should be sized for a maximum current rating of:
IA
V
A
RMS
=
()
=
25
42
25
11 23
.
Decoupling the PVIN and SVIN pins with a 22μF ceramic
capacitor and a 220μF tantalum capacitor is adequate for
most applications.
The burst clamp and output voltage can now be pro-
grammed by choosing the values of R1, R2 and R3. The
voltage on the MODE pin will be set to 0.32V by the resistor
divider consisting of R2 and R3. A burst clamp voltage of
0.32V will set the minimum inductor current, IBURST, as
follows:
IV
V
mA
BURST=
()
=
032
0 2
375
08
563
..
.
APPLICATIO S I FOR ATIO
WU
U
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