參數(shù)資料
型號(hào): LTC3407AEDD#TR
廠商: LINEAR TECHNOLOGY CORP
元件分類: 穩(wěn)壓器
英文描述: 1.25 A DUAL SWITCHING CONTROLLER, 1800 kHz SWITCHING FREQ-MAX, PDSO10
封裝: 3 X 3 MM, PLASTIC, MO-229WEED-2, DFN-10
文件頁(yè)數(shù): 5/16頁(yè)
文件大?。?/td> 263K
代理商: LTC3407AEDD#TR
LTC3407A
13
3407af
APPLICATIO S I FOR ATIO
WU
U
LTC3407A. These items are also illustrated graphically in
the layout diagram of Figure 2. Check the following in your
layout:
1. Does the capacitor CIN connect to the power VIN (Pin 3)
and GND (exposed pad) as closely as possible? This
capacitor provides the AC current to the internal power
MOSFETs and their drivers.
2. Are COUT and L1 closely connected? The (–) plate of
COUT returns current to GND and the (–) plate of CIN.
3. The resistor divider formed by R1 and R2 must be
connected between the (+) plate of COUT and a ground
sense line terminated near GND (exposed pad). The feed-
back signals VFB1 and VFB2 should be routed away from
noisy components and traces, such as the SW lines (Pins
4 and 7), and their traces should be minimized.
4. Keep sensitive components away from the SW pins. The
input capacitor CIN and the resistors R1 to R4 should be
routed away from the SW traces and the inductors.
5. A ground plane is preferred, but if not available keep the
signal and power grounds segregated with small signal
components returning to the GND pin at one point.
Addtionally the two grounds should not share the high
current paths of CIN or COUT.
6. Flood all unused areas on all layers with copper.
Flooding with copper will reduce the temperature rise of
power components. These copper areas should be con-
nected to VIN or GND.
Figure 2. LTC3407A Layout Diagram (See Board Layout Checklist)
RUN/SS2
VIN
VOUT2
VOUT1
RUN/SS1
POR
SW1
VFB1
GND
VFB2
SW2
MODE/SYNC
LTC3407A
CIN
C4
C5
L1
L2
R4
R2
R1
R3
COUT2
COUT1
3407A F03
BOLD LINES INDICATE HIGH CURRENT PATHS
Choosing the closest inductor from a vendor of 2.2
H
inductor, results in a maximum ripple current of:
=
=
I
V
MHz
H
V
mA
L
25
15
22
1
25
42
307
.
. .
.
For cost reasons, a ceramic capacitor will be used. COUT
selection is then based on load step droop instead of ESR
requirements. For a 5% output droop:
C
mA
MHz
V
F
OUT
=
3
600
15
5
25
96
. ( % .
)
.
The closest standard value is 10
F. Since the output
impedance of a Li-Ion battery is very low, CIN is typically
10
F.
The output voltage can now be programmed by choosing
the values of R1 and R2. To maintain high efficiency, the
current in these resistors should be kept small. Choosing
2
A with the 0.6V feedback voltage makes R1~300k. A
close standard 1% resistor is 280k, and R2 is then 887k.
The POR pin is a common drain output and requires a pull-
up resistor. A 100k resistor is used for adequate speed.
Figure 3 shows the complete schematic for this design
example. The specific passive components chosen allow
for a 1mm height power supply that maintains a high
efficiency across load.
Board Layout Considerations
When laying out the printed circuit board, the following
checklist should be used to ensure proper operation of the
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