參數(shù)資料
型號: LTC3406B-2ES5#PBF
廠商: LINEAR TECHNOLOGY CORP
元件分類: 穩(wěn)壓器
英文描述: 1.3 A SWITCHING REGULATOR, 2700 kHz SWITCHING FREQ-MAX, PDSO5
封裝: PLASTIC, M0-193, TSOT-23
文件頁數(shù): 3/16頁
文件大?。?/td> 213K
代理商: LTC3406B-2ES5#PBF
11
LTC3406B-2
sn3406b2 3406b2fs
APPLICATIO S I FOR ATIO
WU
UU
A second, more severe transient is caused by switching in
loads with large (>1F) supply bypass capacitors. The
discharged bypass capacitors are effectively put in parallel
with COUT, causing a rapid drop in VOUT. No regulator can
deliver enough current to prevent this problem if the load
switch resistance is low and it is driven quickly. The only
solution is to limit the rise time of the switch drive so that
the load rise time is limited to approximately (25 CLOAD).
Thus, a 10F capacitor charging to 3.3V would require a
250s rise time, limiting the charging current to about
130mA.
PC Board Layout Checklist
When laying out the printed circuit board, the following
checklist should be used to ensure proper operation of the
LTC3406B-2. These items are also illustrated graphically
in Figures 5 and 6. Check the following in your layout:
1. The power traces, consisting of the GND trace, the SW
trace and the VIN trace should be kept short, direct and
wide.
2. Does the VFB pin connect directly to the feedback
resistors? The resistive divider R1/R2 must be con-
nected between the (+) plate of COUT and ground.
3. Does the (+) plate of CIN connect to VIN as closely as
possible? This capacitor provides the AC current to the
internal power MOSFETs.
4. Keep the switching node, SW, away from the sensitive
VFB node.
5. Keep the (–) plates of CIN and COUT as close as possible.
Figure 5. LTC3406B-2 Layout Diagram
Figure 6. LTC3406B-2 Suggested Layout
RUN
LTC3406B-2
GND
SW
L1
R2
R1
CFWD
BOLD LINES INDICATE HIGH CURRENT PATHS
VIN
VOUT
3406B F05
4
5
1
3
+
2
VFB
VIN
CIN
+
COUT
LTC3406B-2
GND
3406B F06
PIN 1
VOUT
VIN
VIA TO VOUT
SW
VIA TO VIN
VIA TO GND
COUT
CIN
L1
R2
CFWD
R1
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