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參數(shù)資料
| 型號： | LTC3112IFE#PBF |
| 廠商： | LINEAR TECHNOLOGY CORP |
| 元件分類： | 穩(wěn)壓器 |
| 英文描述： | 12 A SWITCHING REGULATOR, 825 kHz SWITCHING FREQ-MAX, PDSO20 |
| 封裝： | 4.40 MM, LEAD FREE, PLASTIC, TSSOP-20 |
| 文件頁數(shù)： | 14/32頁 |
| 文件大?。?/td> | 651K |
| 代理商： | LTC3112IFE#PBF |
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LTC3112
21
3112f
f
ZERO1 =
1
2
πR
FB CFB
f
ZERO2 =
1
2
π R
TOP + RFF
()C
FF
1
2
πR
TOP CFF
f
POLE2 =
C
FB + CPOLE
2
πC
FBCPOLE RFB
1
2
πC
POLE RFB
f
POLE3 =
1
2
πC
FF RFF
In most applications the compensation network is de-
signed so that the loop crossover frequency is above the
resonant frequency of the power stage, but sufciently
below the boost mode right half plane zero to minimize
the additional phase loss. Once the crossover frequency
is decided upon, the phase boost provided by the com-
pensation network is centered at that point in order to
maximize the phase margin. A larger separation in fre-
quency between the zeros and higher order poles will
provide a higher peak phase boost but may also increase
the gain of the error amplier which can push out the loop
crossover to a higher frequency.
The Q of the power stage can have a signicant inuence
on the design of the compensation network because it
determines how rapidly the 180° of phase loss in the power
stage occurs. For very low values of series resistance, RS,
the Q will be higher and the phase loss will occur sharply.
In such cases, the phase of the power stage will fall rapidly
to –180° above the resonant frequency and the total phase
margin must be provided by the compensation network.
However, with higher losses in the power stage (larger RS)
the Q factor will be lower and the phase loss will occur
more gradually. As a result, the power stage phase will not
be as close to –180° at the crossover frequency and less
phase boost is required of the compensation network.
The LTC3112 error amplier is designed to have a xed
maximum bandwidth in order to provide rejection of
switching noise to prevent it from interfering with the
control loop. From a frequency domain perspective, this
can be viewed as an additional single pole as illustrated
in Figure 8. The nominal frequency of this pole is 400kHz.
For typical loop crossover frequencies below about 60kHz
APPLICATIONS INFORMATION
the phase contributed by this additional pole is negligible.
However, for loops with higher crossover frequencies this
additional phase loss should be taken into account when
designing the compensation network.
Figure 8. Internal Loop Filter.
+
–
0.8V
FB
LTC3112
VCOMP
RFILT
CFILT
3112 F08
INTERNAL
VCOMP
Loop Compensation Example
This section provides an example illustrating the design of
a compensation network for a typical LTC3112 application
circuit. In this example a 5V regulated output voltage is
generated with the ability to supply a 1A load from an
input power source ranging from 3.5V to 15V. The nominal
750kHz switching frequency has been chosen. In this
application the maximum inductor current ripple will occur
at the highest input voltage. An inductor value of 4.7μH
has been chosen to limit the worst case inductor current
ripple to approximately 1A. A low ESR output capacitor
with a value of 47μF is specied to yield a worst case
output voltage ripple (occurring at the worst case step-up
ratio and maximum load current) of approximately 10mV.
In summary, the key power stage specications for this
LTC3112 example application are given below.
f = 0.75MHz, tLOW = 0.2μs
VIN = 3.5V to 15V
VOUT = 5V at 1A
COUT = 47μF, RC = 5mΩ
L = 4.7μH, RL = 50mΩ
With the power stage parameters specied, the compen-
sation network can be designed. In most applications,
the most challenging compensation corner is boost
mode operation at the greatest step-up ratio and highest
load current since this generates the lowest frequency
right half plane zero and results in the greatest phase
loss. Therefore, a reasonable approach is to design the
compensation network at this worst case corner and
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| LTC3113 | 制造商:LINER 制造商全稱:Linear Technology 功能描述:40V, 2A Synchronous Buck-Boost DC/DC |
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