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LTC3108-1
31081f
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2: The LTC3108-1 is tested under pulsed load conditions such that
TJ ≈ TA. The LTC3108-1E is guaranteed to meet specifications from
0°C to 85°C junction temperature. Specifications over the –40°C to
125°C operating junction temperature range are assured by design,
characterization and correlation with statistical process controls. The
LTC3108-1I is guaranteed over the full –40°C to 125°C operating junction
temperature range. Note that the maximum ambient temperature
is determined by specific operating conditions in conjunction with
board layout, the rated thermal package thermal resistance and other
environmental factors. The junction temperature (TJ) is calculated from
the ambient temperature (TA) and power dissipation (PD) according to
the formula: TJ = TA + (PD θJA°C/W), where θJA is the package thermal
impedance.
Note 3: Specification is guaranteed by design and not 100% tested in
production.
Note 4: Failure to solder the exposed backside of the package to the PC
board ground plane will result in a thermal resistance much higher than
43°C/W.
Note 5: The absolute maximum rating is a DC rating. Under certain
conditions in the applications shown, the peak AC voltage on the C2 pin
may exceed ±8V. This behavior is normal and acceptable because the
current into the pin is limited by the impedance of the coupling capacitor.
elecTrical characTerisTics The
l
denotes the specifications which apply over the full operating
junction temperature range, otherwise specifications are for TA = 25°C (Note 2). VAUX = 5V, unless otherwise noted.
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
Output Voltage
VS1 = VS2 = GND
VS1 = VAUX, VS2 = GND
VS1 = GND, VS2 = VAUX
VS1 = VS2 = VAUX
l
2.45
2.94
3.626
4.41
2.50
3.00
3.70
4.50
2.55
3.06
3.774
4.59
V
VOUT Quiescent Current
VOUT = 3.7V, VOUT2_EN = 0V
0.2
A
VAUX Quiescent Current
No Load, All Outputs Charged
6
9
A
LDO Output Voltage
0.5mA Load
l
2.134
2.2
2.266
V
LDO Load Regulation
For 0mA to 2mA Load
0.5
1
%
LDO Line Regulation
For VAUX from 2.5V to 5V
0.05
0.2
%
LDO Dropout Voltage
IVLDO = 2mA
l
100
200
mV
LDO Current Limit
VLDO = 0V
l
4
11
mA
VOUT Current Limit
VOUT = 0V
l
2.8
4.5
7
mA
VSTORE Current Limit
VSTORE = 0V
l
2.8
4.5
7
mA
VAUX Clamp Voltage
Current into VAUX = 5mA
l
5
5.25
5.55
V
VSTORE Leakage Current
VSTORE = 5V
0.1
0.3
A
VOUT2 Leakage Current
VOUT2 = 0V, VOUT2_EN = 0V
0.1
A
VS1, VS2 Threshold Voltage
l
0.4
0.85
1.2
V
VS1, VS2 Input Current
VS1 = VS2 = 5V
0.01
0.1
A
PGD Threshold (Rising)
Measured Relative to the VOUT Voltage
–7.5
%
PGD Threshold (Falling)
Measured Relative to the VOUT Voltage
–9
%
PGD VOL
Sink Current = 100A
0.15
0.3
V
PGD VOH
Source Current = 0
2.1
2.2
2.3
V
PGD Pull-Up Resistance
1
MΩ
VOUT2_EN Threshold Voltage
VOUT2_EN Rising
l
0.4
1
1.3
V
VOUT2_EN Pull-Down Resistance
5
MΩ
VOUT2 Turn-On Time
5
s
VOUT2 Turn-Off Time
(Note 3)
0.15
s
VOUT2 Current Limit
VOUT = 3.7V
l
0.15
0.3
0.45
A
VOUT2 Current Limit Response Time
(Note 3)
350
ns
VOUT2 P-Channel MOSFET On-Resistance
VOUT = 3.7V (Note 3)
1.3
Ω
N-Channel MOSFET On-Resistance
C2 = 5V (Note 3)
0.5
Ω