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參數(shù)資料
| 型號： | LTC2905IDDB8#PBF |
| 廠商： | LINEAR TECHNOLOGY CORP |
| 元件分類： | 電源管理 |
| 英文描述： | 2-CHANNEL POWER SUPPLY SUPPORT CKT, PDSO8 |
| 封裝： | 3 X 2 MM, M0-229WECD-1, PLASTIC, DFN-8 |
| 文件頁數(shù)： | 2/16頁 |
| 文件大?。?/td> | 179K |
| 代理商： | LTC2905IDDB8#PBF |
LTC2904/LTC2905
10
29045f
Threshold Accuracy
Reset threshold accuracy is of the utmost importance in a
supply sensitive system. Ideally such a system should not
reset while supply voltages are within a specified margin
below the rated nominal level. Both of the LTC2904/
LTC2905 inputs have the same relative threshold accu-
racy. The specification for LTC2904/LTC2905 is
±1.5% of
the programmed nominal input voltage (over the full
operating temperature range).
For example, when the LTC2904/LTC2905 are programmed
to handle a 5V input with 10% tolerance (S1 = S2 = V1 and
TOL = GND, refer to Table 1 and Table 2), it does not issue
a reset command when V1 is above 4.5V. The typical 10%
trip threshold is at 11.5% below the nominal input voltage
level. Therefore, the typical trip threshold for the 5V input
is 4.425V. With
±1.5% accuracy, the trip threshold range
is 4.425V
±75mV over temperature (i.e. 10% to 13%
below 5V). This implies that the monitored system must
operate reliably down to 4.35V over temperature.
The same system using a supervisor with only
±2.5%
accuracy needs to work reliably down to 4.25V (4.375V
±125mV) or 15% below 5V, requiring the monitored
system to work over a much wider operating voltage
range.
In any supervisory application, supply noise riding on the
monitored DC voltage can cause spurious resets, particu-
larly when the monitored voltage is near the reset thresh-
old. A less desirable but common solution to this problem
is to introduce hysteresis around the nominal threshold.
Notice however, this hysteresis introduces an error term
in the threshold accuracy. Therefore, a
±2.5% accurate
monitor with
±1.0% hysteresis is equivalent to a ±3.5%
monitor with no hysteresis.
The LTC2904/LTC2905 takes a different approach to solve
this problem of supply noise causing spurious reset. The
first line of defense against this spurious reset is a first
order low pass filter at the output of the comparator. Thus,
the comparator output goes through a form of integration
before triggering the output logic. Therefore, any kind of
transient at the input of the comparator needs to be of
sufficient magnitude and duration before it can trigger a
change in the output logic.
The second line of defense is the programmed delay time
tRST (200ms for LTC2904 and using an external capacitor
for LTC2905). This delay will eliminate the effect of any
supply noise whose frequency is above 1/tRST on the RST
and RST output.
When either V1 or V2 drops below its programmed
threshold, the RST pin asserts low (RST weakly pulls
high). Then when the supply recovers above the pro-
grammed threshold, the reset-pulse-generator timer starts
counting.
If the supply remains above the programmed threshold
when the timer finishes counting, the RST pin weakly pulls
high (RST asserts low). However, if the supply falls below
the programmed threshold any time during the period
when the timer is still counting, the timer resets and it
starts fresh when the supply next rises above the pro-
grammed threshold.
Note that this second line of defense is only effective for a
rising supply and does not affect the sensitivity of the
system to a falling supply. Therefore, the first line of
defense that works for both cases of rising and falling is
necessary. These two approaches prevent spurious reset
caused by supply noise without sacrificing the threshold
accuracy.
Selecting the Reset Timing Capacitor
The reset time-out period for LTC2905 is adjustable in
order to accommodate a variety of microprocessor appli-
cations. Connecting a capacitor, CTMR, between the TMR
pin and ground sets the reset time-out period, tRST. The
following formula determines the value of capacitor needed
for a particular reset time-out period:
CTMR = tRST 110 10–9 [F/s]
For example, using a standard capacitor value of 22nF
would give a 22000/110 = 200ms delay.
APPLICATIO S I FOR ATIO
WU
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PDF描述 |
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| LTC2904IDDB8#PBF | 2-CHANNEL POWER SUPPLY SUPPORT CKT, PDSO8 |
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| LTC2905HDDB#TRMPBF | 1-CHANNEL POWER SUPPLY SUPPORT CKT, PDSO8 |
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相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| LTC2905ITS8 | 制造商:Linear Technology 功能描述:Volt Supervisor Monitor 3.3V/5V 8-Pin TSOT-23 |
| LTC2905ITS8#PBF | 制造商:Linear Technology 功能描述:IC VOLT MONITOR 65 uA 5.5V 8-TSOT-23 制造商:Linear Technology 功能描述:IC, VOLT MONITOR, 65 uA, 5.5V, 8-TSOT-23 制造商:Linear Technology 功能描述:IC, VOLT MONITOR, 65 uA, 5.5V, 8-TSOT-23; Threshold Voltage:4.675V; No. of Supervisors / Monitors:2; Supply Voltage Min:3.3V; Supply Voltage Max:5V; Reset Type:Adjustable; Digital IC Case Style:TSOT-23; No. of Pins:8 ;RoHS Compliant: Yes |
| LTC2905ITS8#TR | 功能描述:IC MON DUAL SUPPLY PREC TSOT23-8 RoHS:否 類別:集成電路 (IC) >> PMIC - 監(jiān)控器 系列:- 標準包裝:400 系列:- 類型:備用電池電路 監(jiān)視電壓數(shù)目:1 輸出:開路漏極，推挽式 復位:高有效/低有效 復位超時:最小為 35 ms 電壓 - 閥值:4.65V 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:16-SOIC（0.295"，7.50mm 寬） 供應商設備封裝:16-SOIC W 包裝:帶卷 (TR) 其它名稱:ADM691ARZ-REEL7TR |
| LTC2905ITS8#TRM | 功能描述:IC MON DUAL SUPPLY PREC TSOT23-8 RoHS:否 類別:集成電路 (IC) >> PMIC - 監(jiān)控器 系列:- 標準包裝:400 系列:- 類型:備用電池電路 監(jiān)視電壓數(shù)目:1 輸出:開路漏極，推挽式 復位:高有效/低有效 復位超時:最小為 35 ms 電壓 - 閥值:4.65V 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:16-SOIC（0.295"，7.50mm 寬） 供應商設備封裝:16-SOIC W 包裝:帶卷 (TR) 其它名稱:ADM691ARZ-REEL7TR |
| LTC2905ITS8#TRMPBF | 功能描述:IC MON DUAL SUPPLY PREC TSOT23-8 RoHS:是 類別:集成電路 (IC) >> PMIC - 監(jiān)控器 系列:- 標準包裝:100 系列:- 類型:簡單復位/加電復位 監(jiān)視電壓數(shù)目:1 輸出:開路漏極，開路漏極 復位:高有效/低有效 復位超時:最小為 250 ms 電壓 - 閥值:4.37V，4.62V 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:8-SOIC（0.154"，3.90mm 寬） 供應商設備封裝:8-SOIC 包裝:管件 產品目錄頁面:1337 (CN2011-ZH PDF) |
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