參數(shù)資料
型號: LTC2847IUHF
廠商: Linear Technology
文件頁數(shù): 4/20頁
文件大小: 0K
描述: IC TXRX MULTIPROTOCOL 38-QFN
標(biāo)準(zhǔn)包裝: 52
類型: 收發(fā)器
驅(qū)動器/接收器數(shù): 3/3
規(guī)程: 多協(xié)議
電源電壓: 5V
安裝類型: 表面貼裝
封裝/外殼: 38-WFQFN 裸露焊盤
供應(yīng)商設(shè)備封裝: 38-QFN(5x7)
包裝: 管件
12
LTC2847
sn2847 2847fs
Figure 18. Single Port DCE V.35 Mode Selection in the Cable
Figure 20. V.10 Receiver Input Impedance
Figure 19. Typical V.10 Interface
APPLICATIO S I FOR ATIO
WU
UU
selected. Switching the terminations with FETs is difficult
because the FETs must remain off when the signal voltage
is beyond the supply voltage. Alternatively, custom cables
may contain termination in the cable head or route signals
to various terminations on the board.
The LTC2847/LTC2845 chip set solves the cable termina-
tion switching problem by automatically providing the
appropriate termination and switching on-chip for the
V.10 (RS423), V.11 (RS422), V.28 (RS232) and V.35
electrical protocols.
V.10 (RS423) Interface
All V.10 drivers and receivers necessary for the RS449,
EIA530, EIA530-A, V.36 and X.21 protocols are imple-
mented on the LTC2845.
A typical V.10 unbalanced interface is shown in Figure 19.
A V.10 single-ended generator with output A and ground
C is connected to a differential receiver with input A' con-
nected to A, and ground C' connected via the signal return
to ground C. Usually, no cable termination is required for
V.10 interfaces, but the receiver inputs must be compliant
with the impedance curve shown in Figure 20.
The V.10 receiver configuration in the LTC2845 is shown
in Figure 21. In V.10 mode, switch S3 inside the LTC2845
is turned off. The noninverting input is disconnected
inside the LTC2845 receivers and connected to ground.
NC
CABLE
2847 F18
LTC2847
LTC2845
CONNECTOR
(DATA)
M0
M1
M2
DCE/DTE
M2
M1
M0
(DATA)
AA
'
CC
'
GENERATOR
BALANCED
INTERCONNECTING
CABLE
LOAD
CABLE
TERMINATION
RECEIVER
2847 F19
IZ
VZ
–10V
–3.25mA
3.25mA
–3V
3V
10V
2847 F20
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