VOSADJ(Pin39):DACOffsetAdjustPin.Thisvoltage-control
參數(shù)資料
型號: LTC2757ACLX#PBF
廠商: Linear Technology
文件頁數(shù): 20/20頁
文件大?。?/td> 0K
描述: IC DAC 18BIT PAR 48LQFP
標準包裝: 250
系列: SoftSpan™
設置時間: 2.1µs
位數(shù): 18
數(shù)據(jù)接口: 并聯(lián)
轉(zhuǎn)換器數(shù)目: 1
電壓電源: 單電源
工作溫度: 0°C ~ 70°C
安裝類型: 表面貼裝
封裝/外殼: 48-LQFP
供應商設備封裝: 48-LQFP(7x7)
包裝: 托盤
輸出數(shù)目和類型: 2 電流,單極;2 電流,雙極
采樣率(每秒): *
配用: DC1485A-ND - BOARD DAC LTC2757
LTC2757
9
2757f
PIN FUNCTIONS
VOSADJ(Pin39):DACOffsetAdjustPin.Thisvoltage-control
pin can be used to null unipolar offset or bipolar zero error.
The offset change expressed in LSB is the same for any
output range. See
System Offset and Gain Adjustments in
the Operation section. Tie to ground if not used.
IOUT1 (Pin 40): DAC current output; normally tied to the
negative input (summing junction) of the I/V converter
amplier.
RFB (Pins 41, 42): DAC Feedback Resistor. Normally tied
to the output of the I/V converter amplier. The DAC output
current from IOUT1 ows through the feedback resistor to
the RFB pins. These pins are internally shorted together.
ROFS (Pins 43, 44): Bipolar Offset Network. These pins
provide the translation of the output voltage range for
bipolar spans. Accepts up to ±15V; normally tied to the
positive reference voltage. These pins are internally shorted
together.
REF (Pins 45, 46): Feedback Resistor for the Reference
Inverting Amplier, and Reference Input for the DAC.
Normally tied to the output of the reference inverting
amplier. Typically –5V; accepts up to ±15V. These pins
are internally shorted together.
RCOM (Pin 47): Center Tap Point of RIN and REF. Normally
tied to the negative input of the external reference invert-
ing amplier.
GEADJ (Pin 48): Gain Adjust Pin. This voltage-control
pin can be used to null gain error or to compensate for
reference errors. The gain error change expressed in LSB
is the same for any output range. See
System Offset and
Gain Adjustments in the Operation section. Tie to ground
if not used.
36
35
34
33
20
21
18-BIT DAC WITH SPAN SELECT
DAC
REGISTER
INPUT
REGISTER
RCOM
RIN
1, 2
R2
20k
R1
20k
ROFS
43, 44
REF
45, 46
RFB
41, 42
IOUT1
VOSADJ
2.56M
IOUT2F
IOUT2S
WR
UPD
READ
D/S
CLR
M-SPAN
2757 BD
CONTROL
LOGIC
3
I/O
PORT
DAC
REGISTER
INPUT
REGISTER
18
I/O
PORT
40
39
47
GEADJ
48
6
5
3, 37, 38
SPAN I/O
S2-S0
8-16, 23-31
DATA I/O
D17-D0
BLOCK DIAGRAM
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