VOUT 2mV/DIV 2753 G15 USING AN LT1469 C
鍙冩暩(sh霉)璩囨枡
鍨嬭櫉(h脿o)锛� LTC2753ACUK-16#PBF
寤犲晢锛� Linear Technology
鏂囦欢闋�(y猫)鏁�(sh霉)锛� 24/24闋�(y猫)
鏂囦欢澶у皬锛� 0K
鎻忚堪锛� IC DAC 16BIT DUAL 48-QFN
鐢�(ch菐n)鍝佸煿瑷�(x霉n)妯″锛� LTC275x 18-Bit DAC
妯�(bi膩o)婧�(zh菙n)鍖呰锛� 52
绯诲垪锛� SoftSpan™
瑷�(sh猫)缃檪(sh铆)闁擄細 2µs
浣嶆暩(sh霉)锛� 16
鏁�(sh霉)鎿�(j霉)鎺ュ彛锛� 骞惰伅(li谩n)
杞�(zhu菐n)鎻涘櫒鏁�(sh霉)鐩細 2
闆诲闆绘簮锛� 鍠浕婧�
宸ヤ綔婧害锛� 0°C ~ 70°C
瀹夎椤�(l猫i)鍨嬶細 琛ㄩ潰璨艰
灏佽/澶栨锛� 48-WFQFN 瑁搁湶鐒婄洡(p谩n)
渚涙噳(y墨ng)鍟嗚ō(sh猫)鍌欏皝瑁濓細 48-QFN-EP锛�7x7锛�
鍖呰锛� 绠′欢
杓稿嚭鏁�(sh霉)鐩拰椤�(l猫i)鍨嬶細 4 闆绘祦锛屽柈妤�锛�4 闆绘祦锛岄洐妤�
閲囨ǎ鐜囷紙姣忕锛夛細 *
閰嶇敤锛� DC1111A-ND - BOARD DAC LTC2753-16
LTC2753
9
2753f
500ns/DIV
UPD
5V/DIV
VOUT
2mV/DIV
2753 G15
USING AN LT1469
CFEEDBACK = 27pF
VDD = 5V
VREF = 5V
0V TO 5V RANGE
1nVS (TYP)
DIGITAL INPUT VOLTAGE (V)
01
0
SUPPLY
CURRENT
(mA)
5
10
15
20
2345
2753 G16
VDD = 5V
VDD = 3V
VDD (V)
2.5
0.5
LOGIC
THRESHOLD
(V)
0.75
1
1.25
1.5
2
3
3.5
4
4.5
5
5.5
1.75
2753 G17
RISING
FALLING
UPDATE FREQUENCY (Hz)
10
SUPPLY
CURRENT
(mA)
0.1
0.01
1
100k
0.001
0.0001
100
1k
10k
1M
10
2753 G18
VDD = 5V
VDD = 3V
Midscale Glitch
Logic Threshold
vs Supply Voltage
Supply Current vs
Logic Input Voltage
Supply Current
vs Update Frequency
TYPICAL PERFORMANCE CHARACTERISTICS
LTC2753-12, LTC2753-14, LTC2753-16
TA = 25掳C, unless otherwise noted.
鐩搁棞(gu膩n)PDF璩囨枡
PDF鎻忚堪
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鐩搁棞(gu膩n)浠g悊鍟�/鎶€琛�(sh霉)鍙冩暩(sh霉)
鍙冩暩(sh霉)鎻忚堪
LTC2753AIUK-16#PBF 鍔熻兘鎻忚堪:IC DAC 16BIT DUAL 48-QFN RoHS:鏄� 椤�(l猫i)鍒�:闆嗘垚闆昏矾 (IC) >> 鏁�(sh霉)鎿�(j霉)閲囬泦 - 鏁�(sh霉)妯¤綁(zhu菐n)鎻涘櫒 绯诲垪:SoftSpan™ 鐢�(ch菐n)鍝佸煿瑷�(x霉n)妯″:Data Converter Fundamentals DAC Architectures 妯�(bi膩o)婧�(zh菙n)鍖呰:750 绯诲垪:- 瑷�(sh猫)缃檪(sh铆)闁�:7µs 浣嶆暩(sh霉):16 鏁�(sh霉)鎿�(j霉)鎺ュ彛:骞惰伅(li谩n) 杞�(zhu菐n)鎻涘櫒鏁�(sh霉)鐩�:1 闆诲闆绘簮:闆� ± 鍔熺巼鑰楁暎锛堟渶澶э級:100mW 宸ヤ綔婧害:0°C ~ 70°C 瀹夎椤�(l猫i)鍨�:琛ㄩ潰璨艰 灏佽/澶栨:28-LCC锛圝 褰㈠紩绶氾級 渚涙噳(y墨ng)鍟嗚ō(sh猫)鍌欏皝瑁�:28-PLCC锛�11.51x11.51锛� 鍖呰:甯跺嵎 (TR) 杓稿嚭鏁�(sh霉)鐩拰椤�(l猫i)鍨�:1 闆诲锛屽柈妤�锛�1 闆诲锛岄洐妤� 閲囨ǎ鐜囷紙姣忕锛�:143k
LTC2753AIUK-16#TRPBF 鍔熻兘鎻忚堪:IC DAC 16BIT DUAL 48-QFN RoHS:鏄� 椤�(l猫i)鍒�:闆嗘垚闆昏矾 (IC) >> 鏁�(sh霉)鎿�(j霉)閲囬泦 - 鏁�(sh霉)妯¤綁(zhu菐n)鎻涘櫒 绯诲垪:SoftSpan™ 鐢�(ch菐n)鍝佸煿瑷�(x霉n)妯″:Data Converter Fundamentals DAC Architectures 妯�(bi膩o)婧�(zh菙n)鍖呰:750 绯诲垪:- 瑷�(sh猫)缃檪(sh铆)闁�:7µs 浣嶆暩(sh霉):16 鏁�(sh霉)鎿�(j霉)鎺ュ彛:骞惰伅(li谩n) 杞�(zhu菐n)鎻涘櫒鏁�(sh霉)鐩�:1 闆诲闆绘簮:闆� ± 鍔熺巼鑰楁暎锛堟渶澶э級:100mW 宸ヤ綔婧害:0°C ~ 70°C 瀹夎椤�(l猫i)鍨�:琛ㄩ潰璨艰 灏佽/澶栨:28-LCC锛圝 褰㈠紩绶氾級 渚涙噳(y墨ng)鍟嗚ō(sh猫)鍌欏皝瑁�:28-PLCC锛�11.51x11.51锛� 鍖呰:甯跺嵎 (TR) 杓稿嚭鏁�(sh霉)鐩拰椤�(l猫i)鍨�:1 闆诲锛屽柈妤�锛�1 闆诲锛岄洐妤� 閲囨ǎ鐜囷紙姣忕锛�:143k
LTC2753BCUK-16#PBF 鍔熻兘鎻忚堪:IC DAC 16BIT DUAL 48-QFN RoHS:鏄� 椤�(l猫i)鍒�:闆嗘垚闆昏矾 (IC) >> 鏁�(sh霉)鎿�(j霉)閲囬泦 - 鏁�(sh霉)妯¤綁(zhu菐n)鎻涘櫒 绯诲垪:SoftSpan™ 妯�(bi膩o)婧�(zh菙n)鍖呰:47 绯诲垪:- 瑷�(sh猫)缃檪(sh铆)闁�:2µs 浣嶆暩(sh霉):14 鏁�(sh霉)鎿�(j霉)鎺ュ彛:骞惰伅(li谩n) 杞�(zhu菐n)鎻涘櫒鏁�(sh霉)鐩�:1 闆诲闆绘簮:鍠浕婧� 鍔熺巼鑰楁暎锛堟渶澶э級:55µW 宸ヤ綔婧害:-40°C ~ 85°C 瀹夎椤�(l猫i)鍨�:琛ㄩ潰璨艰 灏佽/澶栨:28-SSOP锛�0.209"锛�5.30mm 瀵級 渚涙噳(y墨ng)鍟嗚ō(sh猫)鍌欏皝瑁�:28-SSOP 鍖呰:绠′欢 杓稿嚭鏁�(sh霉)鐩拰椤�(l猫i)鍨�:1 闆绘祦锛屽柈妤�锛�1 闆绘祦锛岄洐妤� 閲囨ǎ鐜囷紙姣忕锛�:*
LTC2753BCUK-16#TRPBF 鍔熻兘鎻忚堪:IC DAC 16BIT DUAL 48-QFN RoHS:鏄� 椤�(l猫i)鍒�:闆嗘垚闆昏矾 (IC) >> 鏁�(sh霉)鎿�(j霉)閲囬泦 - 鏁�(sh霉)妯¤綁(zhu菐n)鎻涘櫒 绯诲垪:SoftSpan™ 妯�(bi膩o)婧�(zh菙n)鍖呰:47 绯诲垪:- 瑷�(sh猫)缃檪(sh铆)闁�:2µs 浣嶆暩(sh霉):14 鏁�(sh霉)鎿�(j霉)鎺ュ彛:骞惰伅(li谩n) 杞�(zhu菐n)鎻涘櫒鏁�(sh霉)鐩�:1 闆诲闆绘簮:鍠浕婧� 鍔熺巼鑰楁暎锛堟渶澶э級:55µW 宸ヤ綔婧害:-40°C ~ 85°C 瀹夎椤�(l猫i)鍨�:琛ㄩ潰璨艰 灏佽/澶栨:28-SSOP锛�0.209"锛�5.30mm 瀵級 渚涙噳(y墨ng)鍟嗚ō(sh猫)鍌欏皝瑁�:28-SSOP 鍖呰:绠′欢 杓稿嚭鏁�(sh霉)鐩拰椤�(l猫i)鍨�:1 闆绘祦锛屽柈妤碉紱1 闆绘祦锛岄洐妤� 閲囨ǎ鐜囷紙姣忕锛�:*
LTC2753BIUK-16#PBF 鍔熻兘鎻忚堪:IC DAC 16BIT DUAL 48-QFN RoHS:鏄� 椤�(l猫i)鍒�:闆嗘垚闆昏矾 (IC) >> 鏁�(sh霉)鎿�(j霉)閲囬泦 - 鏁�(sh霉)妯¤綁(zhu菐n)鎻涘櫒 绯诲垪:SoftSpan™ 鐢�(ch菐n)鍝佸煿瑷�(x霉n)妯″:Data Converter Fundamentals DAC Architectures 妯�(bi膩o)婧�(zh菙n)鍖呰:750 绯诲垪:- 瑷�(sh猫)缃檪(sh铆)闁�:7µs 浣嶆暩(sh霉):16 鏁�(sh霉)鎿�(j霉)鎺ュ彛:骞惰伅(li谩n) 杞�(zhu菐n)鎻涘櫒鏁�(sh霉)鐩�:1 闆诲闆绘簮:闆� ± 鍔熺巼鑰楁暎锛堟渶澶э級:100mW 宸ヤ綔婧害:0°C ~ 70°C 瀹夎椤�(l猫i)鍨�:琛ㄩ潰璨艰 灏佽/澶栨:28-LCC锛圝 褰㈠紩绶氾級 渚涙噳(y墨ng)鍟嗚ō(sh猫)鍌欏皝瑁�:28-PLCC锛�11.51x11.51锛� 鍖呰:甯跺嵎 (TR) 杓稿嚭鏁�(sh霉)鐩拰椤�(l猫i)鍨�:1 闆诲锛屽柈妤�锛�1 闆诲锛岄洐妤� 閲囨ǎ鐜囷紙姣忕锛�:143k