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參數(shù)資料
| 型號： | LTC2496IUHF#PBF |
| 廠商： | Linear Technology |
| 文件頁數(shù)： | 7/32頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC ADC 16BIT DELTA SIG 38-QFN |
| 標(biāo)準(zhǔn)包裝： | 52 |
| 位數(shù)： | 16 |
| 采樣率（每秒）： | 6.9 |
| 數(shù)據(jù)接口： | MICROWIRE?，串行，SPI? |
| 轉(zhuǎn)換器數(shù)目： | 1 |
| 功率耗散（最大）： | 800µW |
| 電壓電源： | 單電源 |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 38-WFQFN 裸露焊盤 |
| 供應(yīng)商設(shè)備封裝： | 38-QFN（5x7） |
| 包裝： | 管件 |
| 輸入數(shù)目和類型： | 16 個(gè)單端，雙極；8 個(gè)差分，雙極 |
| 配用： | DC1011A-B-ND - BOARD DELTA SIGMA ADC LTC2496 |
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LTC2496
2496fb
applicaTions inForMaTion
INPUT DATA FORMAT
The LTC2496 serial input word is 8 bits long. The input
data (SGL, ODD, A2, A1, A0) is used to select the input
channel. After power up, the device initiates an internal
reset cycle which sets the input channel to CH0 – CH1
(IN+ = CH0, IN– = CH1), The first conversion automatically
begins at power up using the default input channel. Once
the conversion is complete a new word can be written
into the device in order to select the input channel for the
next conversion cycle.
The first 3 bits shifted into the device consist of two preen-
able bits and one enable bit. As demonstrated in Figure 3,
the first three bits shifted into the device enable the device
input channel selection. Valid settings for these three bits
are 000, 100, and 101. Other combinations should be
avoided. If the first three bits are 000 or 100, the following
data is ignored (don’t care) and the previously selected
input channel remains valid for the next conversion
If the first 3 bits shifted into the device are 101, then the
next 5 bits select the input channel for the next conversion
cycle, see Table 3.
The first input bit following the 101 sequence (SGL) de-
termines if the input selection is differential (SGL = 0) or
single-ended (SGL = 1). For SGL = 0, two adjacent chan-
nels can be selected to form a differential input. For SGL
= 1, one of 16-channels is selected as the positive input.
The negative input is COM for all single ended operations.
The remaining 4 bits (ODD, A2, A1, A0) determine which
channel(s)is/areselectedandthepolarity(foradifferential
input). This data sequence is backward compatible with
the LTC2448 and LTC2418 families of delta sigma ADCs.
SERIAL INTERFACE TIMING MODES
The LTC2496’s 4-wire interface is SPI and MICROWIRE
compatible. This interface offers several flexible modes
of operation. These include internal/external serial clock,
3-or4-wireI/O,singlecycleorcontinuousconversion.The
following sections describe each of these timing modes
in detail. In all cases, the converter can use the internal
oscillator (fO = LOW or fO = HIGH) or an external oscillator
connectedtothefOpin.Foreachmode,theoperatingcycle,
data input format, data output format, and performance
remain the same. Refer to Table 4 for a summary.
Table 2. LTC2496 Output Data Format
DIFFERENTIAL INPUT VOLTAGE
VIN*
BIT 23
EOC
BIT 22
DMY
BIT 21
SIG
BIT 20
MSB
BIT 19
BIT 18
BIT 17
…
BIT 4
BITS 3 TO 0
VIN* ≥ FS**
0
1
0
…
0
0000
FS** – 1LSB
0
1
0
1
…
1
0000
0.5 FS**
0
1
0
1
0
…
0
0000
0.5 FS** – 1LSB
0
1
0
1
…
1
0000
0
1
0
…
0
0000
–1LSB
0
1
…
1
0000
–0.5 FS**
0
1
0
…
0
0000
–0.5 FS** – 1LSB
0
1
0
1
…
1
0000
–FS**
0
1
0
…
0
0000
VIN* < –FS**
0
1
…
1
0000
*The differential input voltage VIN = IN+ – IN–. **The full-scale voltage FS = 0.5 VREF.
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