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參數(shù)資料
| 型號(hào)： | LTC2489IDE#PBF |
| 廠商： | Linear Technology |
| 文件頁數(shù)： | 7/24頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC ADC 16BIT DELTA SIG 14-DFN |
| 標(biāo)準(zhǔn)包裝： | 91 |
| 位數(shù)： | 16 |
| 采樣率（每秒）： | 7.5 |
| 數(shù)據(jù)接口： | I²C，串行 |
| 轉(zhuǎn)換器數(shù)目： | 1 |
| 功率耗散（最大）： | 480µW |
| 電壓電源： | 單電源 |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 14-WFDFN 裸露焊盤 |
| 供應(yīng)商設(shè)備封裝： | 14-DFN-EP（4x3） |
| 包裝： | 管件 |
| 輸入數(shù)目和類型： | 4 個(gè)單端，雙極；2 個(gè)差分，雙極 |
| 產(chǎn)品目錄頁面： | 1348 (CN2011-ZH PDF) |
| 配用： | DC1010A-B-ND - BOARD DELTA SIGMA ADC LTC2489 |
LTC2489
15
2489fa
Figure 6. Write, Read, Start Conversion
Figure 7. Start a New Conversion Without Reading Old Conversion Result
APPLICATIONS INFORMATION
Figure 6 shows a cycle which begins with a data Write,
a repeated Start, followed by a Read and concluded with
a Stop command. The following conversion begins after
all 24 bits are read out of the device or after a Stop com-
mand. The following conversion will be performed using
the newly programmed data.
Discarding a Conversion Result and Initiating a New
Conversion with Optional Write
At the conclusion of a conversion cycle, a write cycle
can be initiated. Once the write cycle is acknowledged, a
Stop command will start a new conversion. If a new input
channel is required, this data can be written into the device
and a Stop command will initiate the next conversion (see
Figure 7).
Synchronizing Multiple LTC2489s with a Global
Address Call
In applications where several LTC2489s (or other I2C
delta-sigma ADCs from Linear Technology Corporation)
are used on the same I2C bus, all converters can be syn-
chronized through the use of a global address call. Prior
to issuing the global address call, all converters must have
completed a conversion cycle. The master then issues a
Start, followed by the global address 1110111, and a write
request. All converters will be selected and acknowledge
the request. The master then sends a write byte (optional)
followed by the Stop command. This will update the chan-
nel selection (optional) and simultaneously initiate a start
of conversion for all delta-sigma ADCs on the bus (see
Figure 8). In order to synchronize multiple converters
Figure 8. Synchronize Multiple LTC2489s with a Global Address Call
7-BIT ADDRESS
S
R
W ACK
ACK
WRITE
Sr
P
READ
2489 F06
CONVERSION
ADDRESS
SLEEP
DATA OUTPUT
DATA INPUT
7-BIT ADDRESS
S
W ACK
WRITE (OPTIONAL)
P
2489 F07
CONVERSION
SLEEP
DATA INPUT
GLOBAL ADDRESS
SCL
SDA
S
W ACK
WRITE (OPTIONAL)
P
2489 F08
…
LTC2489
ALL LTC2489s IN SLEEP
CONVERSION OF ALL LTC2489s
DATA INPUT
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