- 鎮ㄧ従(xi脿n)鍦ㄧ殑浣嶇疆锛�璨疯常IC缍�(w菐ng) > PDF鐩寗2006 > LTC2433-1IMS#TRPBF (Linear Technology)IC ADC DIFF 16BIT 3WIRE 10-MSOP PDF璩囨枡涓嬭級
鍙冩暩(sh霉)璩囨枡
| 鍨嬭櫉(h脿o)锛� | LTC2433-1IMS#TRPBF |
| 寤犲晢锛� | Linear Technology |
| 鏂囦欢闋佹暩(sh霉)锛� | 16/28闋� |
| 鏂囦欢澶�?銆�?/td> | 0K |
| 鎻忚堪锛� | IC ADC DIFF 16BIT 3WIRE 10-MSOP |
| 妯�(bi膩o)婧�(zh菙n)鍖呰锛� | 2,500 |
| 浣嶆暩(sh霉)锛� | 16 |
| 閲囨ǎ鐜囷紙姣忕锛夛細 | 6.8 |
| 鏁�(sh霉)鎿�(j霉)鎺ュ彛锛� | MICROWIRE?锛屼覆琛�锛孲PI? |
| 杞�(zhu菐n)鎻涘櫒鏁�(sh霉)鐩細 | 2 |
| 鍔熺巼鑰楁暎锛堟渶澶э級锛� | 1mW |
| 闆诲闆绘簮锛� | 鍠浕婧� |
| 宸ヤ綔婧害锛� | -40°C ~ 85°C |
| 瀹夎椤炲瀷锛� | 琛ㄩ潰璨艰 |
| 灏佽/澶栨锛� | 10-TFSOP锛�10-MSOP锛�0.118"锛�3.00mm 瀵級 |
| 渚涙噳(y墨ng)鍟嗚ō(sh猫)鍌欏皝瑁濓細 | 10-MSOP |
| 鍖呰锛� | 甯跺嵎 (TR) |
| 杓稿叆鏁�(sh霉)鐩拰椤炲瀷锛� | 1 鍊�(g猫)宸垎锛岄洐妤� |
| 閰嶇敤锛� | DC745A-ND - BOARD DELTA SIGMA ADC LTC2433-1 |
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LTC2433-1
23
24331fa
Larger values of reference capacitors (CREF > 0.01F) may
be required as reference filters in certain configurations.
Such capacitors will average the reference sampling charge
and the external source resistance will see a quasi con-
stant reference differential impedance. When FO = LOW
(internal oscillator and 50Hz/60Hz notch), the typical
differential reference resistance is 4.2M
which will gen-
erate a gain error of approximately 1LSB full scale for each
120
of source resistance driving REF+ or REF鈥�. When FO
is driven by an external oscillator with a frequency fEOSC
(external conversion clock operation), the typical differen-
tial reference resistance is 0.60 1012/fEOSC and each
ohm of source resistance drving REF+ or REF鈥� will result
in 5.1 10鈥�8 fEOSCLSB gain error at full scale. The effect
Figure 19. +FS Error vs RSOURCE at REF+ or REF鈥� (Small CIN)
Figure 20. 鈥揊S Error vs RSOURCE at REF+ or REF鈥� (Small CIN)
Figure 21. +FS Error vs RSOURCE at REF+ and REF鈥� (Large CREF)
Figure 22. 鈥揊S Error vs RSOURCE at REF+ and REF鈥� (Large CREF)
RSOURCE ()
1
10
100
1k
10k
100k
+FS
ERROR
(LSB)
24331 F19
0
鈥�1
鈥�2
鈥�3
VCC = 5V
REF+ = 5V
REF 鈥� = GND
IN+ = 3.75V
IN 鈥� = 1.25V
FO = GND
TA = 25掳C
CREF = 0.01F
CREF = 0.001F
CREF = 100pF
CREF = 0pF
RSOURCE ()
1
10
100
1k
10k
100k
鈥�
FS
ERROR
(LSB)
24331 F20
3
2
1
0
CREF = 0.01F
CREF = 0.001F
CREF = 100pF
CREF = 0pF
VCC = 5V
REF+ = 5V
REF 鈥� = GND
IN+ = 1.25V
IN 鈥� = 3.75V
FO = GND
TA = 25掳C
RSOURCE ()
0
+FS
ERROR
(LSB)
0
鈥�5
鈥�10
800
24331 F21
200
400
600
1000
700
100
300
500
900
VCC = 5V
REF+ = 5V
REF鈥� = GND
IN+ = 3.75V
IN 鈥� = 1.25V
FO = GND
TA = 25掳C
CREF = 0.01F
CREF = 1F
CREF = 0.1F
CREF = 10F
RSOURCE ()
0
鈥�
FS
ERROR
(LSB)
10
5
0
800
24331 F22
200
400
600
1000
700
100
300
500
900
VCC = 5V
REF+ = 5V
REF鈥� = GND
IN+ = 1.25V
IN 鈥� = 3.75V
FO = GND
TA = 25掳C
CREF = 0.01F
CREF = 1F
CREF = 0.1F
CREF = 10F
of the source resistance on the two reference pins is
additive with respect to this gain error. The typical +FS and
鈥揊S errors for various combinations of source resistance
seen by the REF+ and REF鈥� pins and external capacitance
CREF connected to these pins are shown in Figures 19, 20,
21 and 22.
In addition to this gain error, the converter INL perfor-
mance is degraded by the reference source impedance.
When FO = LOW (internal oscillator and 50Hz/60Hz notch),
every 1000
of source resistance driving REF+ or REF鈥�
translates into about 1LSB additional INL error. When FO
is driven by an external oscillator with a frequency fEOSC,
every 1000
of source resistance driving REF+ or REF鈥�
APPLICATIO S I FOR ATIO
WU
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