V
參數(shù)資料
型號: LTC2365IS6#TRPBF
廠商: Linear Technology
文件頁數(shù): 24/24頁
文件大?。?/td> 0K
描述: IC ADC 12BIT 1MSPS TSOT23-6
標準包裝: 2,500
位數(shù): 12
采樣率(每秒): 1M
數(shù)據(jù)接口: MICROWIRE?,串行,SPI?
轉(zhuǎn)換器數(shù)目: 1
功率耗散(最大): 12.6mW
電壓電源: 單電源
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: SOT-23-6 細型,TSOT-23-6
供應(yīng)商設(shè)備封裝: TSOT-23-6
包裝: 帶卷 (TR)
輸入數(shù)目和類型: 1 個單端,單極
配用: DC1190A-B-ND - BOARD SAR ADC LTC2365
LTC2365/LTC2366
9
23656fb
For more information www.linear.com/LTC2365
pin Functions
LTC2365/LTC2366 (S6 Package)
VDD (Pin 1): Positive Supply. The VDD range is 2.35V to
3.6V. VDD also defines the input span of the ADC, 0V to
VDD. Bypass to GND and to a solid ground plane with a
10F ceramic capacitor (or 10F tantalum in parallel with
0.1F ceramic).
GND (Pin 2): Ground. The GND pin must be tied directly
to a solid ground plane.
AIN (Pin 3): Analog Input. AIN is a single-ended input with
respect to GND with a range from 0V to VDD.
SCK (Pin 4): Shift Clock Input. The SCK serial clock ad-
vances the conversion process. SDO data transitions on
the falling edge of SCK.
SDO (Pin 5): Three-State Serial Data Output. The A/D
conversion result is shifted out on SDO as a serial data
stream with MSB first. The data stream consists of two
leading zeros followed by 12 bits of conversion data and
two trailing zeros.
CS (Pin 6): Chip Select Input. This active low signal starts
a conversion on the falling edge and frames the serial
data transfer.
LTC2365/LTC2366 (TS8 Package)
VDD (Pin 1): Positive Supply. The VDD range is 2.35V to
3.6V. Bypass to GND and to a solid ground plane with a
10F ceramic capacitor (or 10F tantalum in parallel with
0.1F ceramic).
VREF (Pin 2): Reference Input. VREF defines the input
span of the ADC, 0V to VREF and the VREF range is 1.4V
to VDD. Bypass to GND and to a solid ground plane with
a 4.7F ceramic capacitor (or 4.7F tantalum in parallel
with 0.1F ceramic).
GND (Pin 3): Ground. The GND pin must be tied directly
to a solid ground plane.
AIN (Pin 4): Analog Input. AIN is a single-ended input with
respect to GND with a range from 0V to VREF.
OVDD (Pin 5): Output Driver Supply for SDO. The OVDD
range is 1V to VDD. Bypass to GND and to a solid ground
plane with a 4.7F ceramic capacitor (or 4.7F tantalum
in parallel with 0.1F ceramic).
SDO (Pin 6): Three-State Serial Data Output. The A/D
conversion result is shifted out on SDO as a serial data
stream with MSB first. The data stream consists of two
leading zeros followed by 12 bits of conversion data and
two trailing zeros.
SCK (Pin 7): Shift Clock Input. The SCK serial clock ad-
vances the conversion process. SDO data transitions on
the falling edge of SCK.
CS (Pin 8): Chip Select Input. This active low signal starts
a conversion on the falling edge and frames the serial
data transfer.
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