參數(shù)資料
型號: LTC2288IUP
廠商: LINEAR TECHNOLOGY CORP
元件分類: ADC
英文描述: Dual 10-Bit, 65/40/25Msps Low Noise 3V ADCs
中文描述: DUAL 1-CH 10-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS, PQCC64
封裝: 9 X 9 MM, PLASTIC, MO-220-WNJR-5, QFN-64
文件頁數(shù): 27/28頁
文件大?。?/td> 886K
代理商: LTC2288IUP
LTC2288/LTC2287/LTC2286
27
228876f
PACKAGE DESCRIPTIO
U
UP Package
64-Lead Plastic QFN (9mm
×
9mm)
(Reference LTC DWG # 05-08-1705)
9 .00
0.10
(4 SIDES)
NOTE:
1. DRAWING CONFORMS TO JEDEC PACKAGE OUTLINE MO-220 VARIATION WNJR-5
2. ALL DIMENSIONS ARE IN MILLIMETERS
3. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE
MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.20mm ON ANY SIDE, IF PRESENT
4. EXPOSED PAD SHALL BE SOLDER PLATED
5. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION ON THE TOP AND BOTTOM OF PACKAGE
6. DRAWING NOT TO SCALE
PIN 1 TOP MARK
(SEE NOTE 5)
0.40
±
0.10
64
63
1
2
BOTTOM VIEW—EXPOSED PAD
7.15
±
0.10
(4-SIDES)
0.75
±
0.05
R = 0.115
TYP
0.25
±
0.05
0.50 BSC
0.200 REF
0.00 – 0.05
(UP64) QFN 1003
RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS
0.70
±
0.05
7.15
0.05
(4 SIDES)
8.10
±
0.05 9.50
±
0.05
0.25
±
0.05
0.50 BSC
PACKAGE OUTLINE
PIN 1
CHAMFER
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no represen-
tation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
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