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參數(shù)資料
| 型號： | LTC2258IUJ-14#PBF |
| 廠商： | Linear Technology |
| 文件頁數(shù)： | 1/34頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC ADC 14BIT 65MSPS 1.8V 40-QFN |
| 產(chǎn)品培訓模塊： | LTC2262 - Ultra Low Power High Speed ADCs |
| 標準包裝： | 61 |
| 位數(shù)： | 14 |
| 采樣率（每秒）： | 65M |
| 數(shù)據(jù)接口： | 并聯(lián)，串行，SPI |
| 轉(zhuǎn)換器數(shù)目： | 1 |
| 功率耗散（最大）： | 90mW |
| 電壓電源： | 單電源 |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 40-WFQFN 裸露焊盤 |
| 供應(yīng)商設(shè)備封裝： | 40-QFN（6x6） |
| 包裝： | 管件 |
| 輸入數(shù)目和類型： | 1 個差分 |
| 配用： | DC718C-ND - DEMO QUIKEVAL-II DATA |
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1
225814fc
LTC2258-14
LTC2257-14/LTC2256-14
For more information www.linear.com/LTC2258-14
Typical applicaTion
FeaTures
applicaTions
DescripTion
14-Bit, 65/40/25Msps
Ultralow Power 1.8V ADCs
n
Communications
n
Cellular Base Stations
n
Software Defined Radios
n
Portable Medical Imaging
n
Multi-Channel Data Acquisition
n
Nondestructive Testing
L
, LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks of Linear
Technology Corporation. All other trademarks are the property of their respective owners.
n
74dB SNR
n
88dB SFDR
n
Low Power: 81mW/49mW/35mW
n
Single 1.8V Supply
n
CMOS, DDR CMOS or DDR LVDS Outputs
n
Selectable Input Ranges: 1VP-P to 2VP-P
n
800MHz Full-Power Bandwidth S/H
n
Optional Data Output Randomizer
n
Optional Clock Duty Cycle Stabilizer
n
Shutdown and Nap Modes
n
Serial SPI Port for Configuration
n
Pin Compatible 14-Bit and 12-Bit Versions
n
40-Pin (6mm × 6mm) QFN Package
The LTC2258-14/LTC2257-14/LTC2256-14 are sam-
pling 14-bit A/D converters designed for digitizing high
frequency, wide dynamic range signals. They are perfect
for demanding communications applications with AC
performance that includes 74dB SNR and 88dB spurious
free dynamic range (SFDR). Ultralow jitter of 0.17psRMS
allows undersampling of IF frequencies with excellent
noise performance.
DC specs include ±1LSB INL (typical), ±0.3LSB DNL (typi-
cal)andnomissingcodesovertemperature.Thetransition
noise is a low 1.13LSBRMS.
The digital outputs can be either full rate CMOS, double
data rate CMOS, or double data rate LVDS. A separate
output power supply allows the CMOS output swing to
range from 1.2V to 1.8V.
The ENC+ and ENC– inputs may be driven differentially
or single ended with a sine wave, PECL, LVDS, TTL or
CMOS inputs. An optional clock duty cycle stabilizer al-
lows high performance at full speed for a wide range of
clock duty cycles.
LTC2258-14 2-Tone FFT,
fIN = 68MHz and 69MHz
–
+
INPUT
S/H
CORRECTION
LOGIC
OUTPUT
DRIVERS
14-BIT
PIPELINED
ADC CORE
CLOCK/DUTY
CYCLE
CONTROL
D13
D0
65MHz
CLOCK
ANALOG
INPUT
225814 TA01a
CMOS
OR
LVDS
1.2V
TO 1.8V
1.8V
VDD
OVDD
OGND
GND
FREQUENCY (MHz)
0
–100
–110
–120
–70
–60
–80
–90
AMPLITUDE
(dBFS) –50
–30
–40
–20
–10
0
10
20
30
225814 TA01b
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| LTC2258IUJ-14-TRPBF | 制造商:LINER 制造商全稱:Linear Technology 功能描述:14-Bit, 65/40/25Msps Ultralow Power 1.8V ADCs |
| LTC2258UJ-12 | 制造商:LINER 制造商全稱:Linear Technology 功能描述:12-Bit, 65/40/2 5Msps Ultralow Power 1.8V ADCs |
| LTC2258UJ-14 | 制造商:LINER 制造商全稱:Linear Technology 功能描述:14-Bit, 65/40/25Msps Ultralow Power 1.8V ADCs |
| LTC2259-12 | 制造商:LINER 制造商全稱:Linear Technology 功能描述:12-Bit, 125/105/80Msps Ultralow Power 1.8V ADCs |
| LTC2259-14 | 制造商:LINER 制造商全稱:Linear Technology 功能描述:16-Bit, 65Msps/40Msps/25Msps Low Power Dual ADCs |
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