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參數(shù)資料
| 型號： | LTC2241CUP-10#TRPBF |
| 廠商： | Linear Technology |
| 文件頁數(shù)： | 10/28頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC ADC 10BIT 210MSPS 64-QFN |
| 標準包裝： | 2,000 |
| 位數(shù)： | 10 |
| 采樣率（每秒）： | 210M |
| 數(shù)據(jù)接口： | 并聯(lián) |
| 轉(zhuǎn)換器數(shù)目： | 1 |
| 功率耗散（最大）： | 805mW |
| 電壓電源： | 單電源 |
| 工作溫度： | 0°C ~ 70°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 64-WFQFN 裸露焊盤 |
| 供應(yīng)商設(shè)備封裝： | 64-QFN（9x9） |
| 包裝： | 帶卷 (TR) |
| 輸入數(shù)目和類型： | 1 個差分，雙極 |
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LTC2241-10
18
224110fb
APPLICATIONS INFORMATION
Other voltage ranges in between the pin selectable ranges
can be programmed with two external resistors as shown
in Figure 10. An external reference can be used by ap-
plying its output directly or through a resistor divider to
SENSE. It is not recommended to drive the SENSE pin
with a logic device. The SENSE pin should be tied to the
appropriate level as close to the converter as possible. If
the SENSE pin is driven externally, it should be bypassed
to ground as close to the device as possible with a 1μF
ceramic capacitor.
Input Range
The input range can be set based on the application.
The 2V input range will provide the best signal-to-noise
performance while maintaining excellent SFDR. The 1V
input range will have better SFDR performance, but the
SNR will degrade by 1.7dB. See the Typical Performance
Characteristics section.
Driving the Encode Inputs
The noise performance of the LTC2241-10 can depend
on the encode signal quality as much as on the analog
input. The ENC+/ENC– inputs are intended to be driven
differentially, primarily for noise immunity from com-
mon mode noise sources. Each input is biased through
a 4.8k resistor to a 1.5V bias. The bias resistors set the
DC operating point for transformer coupled drive circuits
and can set the logic threshold for single-ended drive
circuits.
Any noise present on the encode signal will result in ad-
ditional aperture jitter that will be RMS summed with the
inherent ADC aperture jitter.
In applications where jitter is critical (high input frequen-
cies) take the following into consideration:
1. Differential drive should be used.
2. Use as large an amplitude as possible; if transformer cou-
pled use a higher turns ratio to increase the amplitude.
3. If the ADC is clocked with a sinusoidal signal, lter the
encode signal to reduce wideband noise.
4. Balance the capacitance and series resistance at both
encode inputs so that any coupled noise will appear at both
inputs as common mode noise. The encode inputs have a
common mode range of 1.2V to 2.0V. Each input may be
driven from ground to VDD for single-ended drive.
Figure 9. Equivalent Reference Circuit
Figure 10. 1.5V Range ADC
VCM
REFHA
REFLB
SENSE
TIE TO VDD FOR 2V RANGE;
TIE TO VCM FOR 1V RANGE;
RANGE = 2 VSENSE FOR
0.5V < VSENSE < 1V
1.25V
REFLA
REFHB
2.2μF
INTERNAL ADC
HIGH REFERENCE
BUFFER
0.1μF
224110 F09
LTC2241-10
2Ω
DIFF AMP
1μF
0.1μF
INTERNAL ADC
LOW REFERENCE
1.25V BANDGAP
REFERENCE
1V
0.5V
RANGE
DETECT
AND
CONTROL
VCM
SENSE
1.25V
2.2μF
8k
12k
0.75V
1μF
224110 F10
LTC2241-10
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| LTC2241CUP-12 | 制造商:LINER 制造商全稱:Linear Technology 功能描述:12-Bit, 210Msps ADC |
| LTC2241CUP-12#PBF | 制造商:Linear Technology 功能描述:ADC Single Pipelined 210Msps 12-bit Parallel/LVDS 64-Pin QFN EP 制造商:Linear Technology 功能描述:IC ADC 12BIT 210MSPS 64-QFN 制造商:Linear Technology 功能描述:IC, ADC, 12BIT, 210MSPS, QFN-64; Resolution (Bits):12bit; Sampling Rate:210MSPS; Supply Voltage Type:Single; Supply Voltage Min:2.375V; Supply Voltage Max:2.625V; Supply Current:226mA; Digital IC Case Style:QFN; No. of Pins:64 ;RoHS Compliant: Yes |
| LTC2241CUP-12#TRPBF | 制造商:Linear Technology 功能描述:ADC Single Pipelined 210Msps 12-bit Parallel/LVDS 64-Pin QFN EP T/R 制造商:Linear Technology 功能描述:IC ADC 12BIT 210MSPS 64-QFN |
| LTC2241CUP-12-PBF | 制造商:LINER 制造商全稱:Linear Technology 功能描述:12-Bit, 210Msps ADC |
| LTC2241CUP-12-TR | 制造商:LINER 制造商全稱:Linear Technology 功能描述:12-Bit, 210Msps ADC |
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