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參數(shù)資料
| 型號： | LTC2240IUP-10#PBF |
| 廠商： | Linear Technology |
| 文件頁數(shù)： | 9/28頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC ADC 10BIT 170MSPS 64-QFN |
| 標(biāo)準(zhǔn)包裝： | 40 |
| 位數(shù)： | 10 |
| 采樣率（每秒）： | 170M |
| 數(shù)據(jù)接口： | 并聯(lián) |
| 轉(zhuǎn)換器數(shù)目： | 1 |
| 功率耗散（最大）： | 638mW |
| 電壓電源： | 單電源 |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 64-WFQFN 裸露焊盤 |
| 供應(yīng)商設(shè)備封裝： | 64-QFN（9x9） |
| 包裝： | 管件 |
| 輸入數(shù)目和類型： | 1 個差分，雙極 |
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LTC2240-10
17
224010fb
APPLICATIONS INFORMATION
the sample-and-hold charging glitches and limiting the
wideband noise at the converter input. For input frequen-
cies higher than 100MHz, the capacitor may need to be
decreased to prevent excessive signal loss.
The AIN+ and AIN– inputs each have two pins to reduce
package inductance. The two AIN+ and the two AIN– pins
should be shorted together.
For input frequencies above 100MHz the input circuits of
Figure 6, 7 and 8 are recommended. The balun transformer
gives better high frequency response than a ux coupled
center tapped transformer. The coupling capacitors allow
the analog inputs to be DC biased at 1.25V. In Figure 8 the
series inductors are impedance matching elements that
maximize the ADC bandwidth.
Reference Operation
Figure 9 shows the LTC2240-10 reference circuitry consist-
ing of a 1.25V bandgap reference, a difference amplier
and switching and control circuit. The internal voltage
reference can be congured for two pin selectable input
ranges of 2V (±1V differential) or 1V (±0.5V differential).
Tying the SENSE pin to VDD selects the 2V range; typing
the SENSE pin to VCM selects the 1V range.
The 1.25V bandgap reference serves two functions: its
output provides a DC bias point for setting the common
mode voltage of any external input circuitry; additionally,
the reference is used with a difference amplier to gener-
ate the differential reference levels needed by the internal
ADC circuitry. An external bypass capacitor is required
for the 1.25V reference output, VCM. This provides a high
frequency low impedance path to ground for internal and
external circuitry.
The difference amplier generates the high and low
reference for the ADC. High speed switching circuits are
connected to these outputs and they must be externally
bypassed. Each output has four pins: two each of REFHA
and REFHB for the high reference and two each of REFLA
and REFLB for the low reference. The multiple output pins
are needed to reduce package inductance. Bypass capaci-
tors must be connected as shown in Figure 9.
Figure 6. Recommended Front End Circuit for
Input Frequencies Between 100MHz and 250MHz
Figure 7. Recommended Front End Circuit for
Input Frequencies Between 250MHz and 500MHz
Figure 8. Recommended Front End Circuit for
Input Frequencies Above 500MHz
25Ω
12Ω
10Ω
0.1μF
AIN
+
AIN
+
AIN
–
AIN
–
8pF
2.2μF
VCM
ANALOG
INPUT
0.1μF
T1
T1 = MA/COM ETC1-1-13
RESISTORS, CAPACITORS
ARE 0402 PACKAGE SIZE
224010 F06
LTC2240-10
25Ω
10Ω
25Ω
0.1μF
AIN
+
AIN
+
AIN
–
AIN
–
2.2μF
VCM
ANALOG
INPUT
0.1μF
T1
T1 = MA/COM ETC1-1-13
RESISTORS, CAPACITORS
ARE 0402 PACKAGE SIZE
224010 F07
LTC2240-10
25Ω
10Ω
25Ω
0.1μF
AIN
+
AIN
+
AIN
–
AIN
–
2.2μF
VCM
LTC2240-10
ANALOG
INPUT
0.1μF
T1
T1 = MA/COM ETC1-1-13
RESISTORS, CAPACITORS
ARE 0402 PACKAGE SIZE
224010 F08
2.7nH
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| LTC2240IUP-10-TR | 制造商:LINER 制造商全稱:Linear Technology 功能描述:10-Bit, 170Msps ADC |
| LTC2240IUP-10-TRPBF | 制造商:LINER 制造商全稱:Linear Technology 功能描述:10-Bit, 170Msps ADC |
| LTC2240IUP-12 | 制造商:Linear Technology 功能描述:ADC Single Pipelined 170Msps 12-bit Parallel/LVDS 64-Pin QFN EP |
| LTC2240IUP-12#PBF | 功能描述:IC ADC 12BIT 170MSPS 64-QFN RoHS:是 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 模數(shù)轉(zhuǎn)換器 系列:- 其它有關(guān)文件:TSA1204 View All Specifications 標(biāo)準(zhǔn)包裝:1 系列:- 位數(shù):12 采樣率（每秒）:20M 數(shù)據(jù)接口:并聯(lián) 轉(zhuǎn)換器數(shù)目:2 功率耗散（最大）:155mW 電壓電源:模擬和數(shù)字 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:48-TQFP 供應(yīng)商設(shè)備封裝:48-TQFP（7x7） 包裝:Digi-Reel® 輸入數(shù)目和類型:4 個單端，單極；2 個差分，單極 產(chǎn)品目錄頁面:1156 (CN2011-ZH PDF) 其它名稱:497-5435-6 |
| LTC2240IUP-12#TR | 制造商:Linear Technology 功能描述:ADC Single Pipelined 170Msps 12-bit Parallel/LVDS 64-Pin QFN EP T/R |
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