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參數(shù)資料
| 型號： | LTC2217IUP |
| 廠商： | LINEAR TECHNOLOGY CORP |
| 元件分類： | ADC |
| 英文描述： | 1-CH 16-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS, PQCC64 |
| 封裝： | 9 X 9 MM, PLASTIC, MO-220WNJR, QFN-64 |
| 文件頁數(shù)： | 1/32頁 |
| 文件大?。?/td> | 1285K |
| 代理商： | LTC2217IUP |
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LTC2217
1
2217f
2217 TA01b
–130
–120
–110
–100
–90
–80
–70
–60
–50
–40
–30
–20
–10
0
FREQUENCY (MHz)
AMPLITUDE
(dBFS)
010
30
40
20
50
TYPICAL APPLICATION
APPLICATIONS
16-Bit, 105Msps
Low Noise ADC
The LTC2217 is a 105Msps sampling 16-bit A/D converter
designed for digitizing high frequency, wide dynamic range
signals with input frequencies up to 400MHz. The input
range of the ADC is xed at 2.75VP-P.
The LTC2217 is perfect for demanding communications
applications, with AC performance that includes 81.3dBFS
Noise Floor and 100dB spurious free dynamic range
(SFDR). Ultra low jitter of 85fsRMS allows undersampling
of high input frequencies while maintaining excellent noise
performance. Maximum DC specications include ±3.5LSB
INL, ±1LSB DNL (no missing codes).
The digital output can be either differential LVDS or
single-ended CMOS. There are two format options for the
CMOS outputs: a single bus running at the full data rate or
demultiplexed buses running at half data rate. A separate
output power supply allows the CMOS output swing to
range from 0.5V to 3.6V.
The ENC+ and ENC– inputs may be driven differentially
or single-ended with a sine wave, PECL, LVDS, TTL or
CMOS inputs. An optional clock duty cycle stabilizer al-
lows high performance at full speed with a wide range of
clock duty cycles.
■
Telecommunications
■
Receivers
■
Cellular Base Stations
■
Spectrum Analysis
■
Imaging Systems
■
ATE
■
Sample Rate: 105Msps
■
81.3dBFS Noise Floor
■
100dB SFDR
■
SFDR >90dB at 70MHz
■
85fsRMS Jitter
■
2.75VP-P Input Range
■
400MHz Full Power Bandwidth S/H
■
Optional Internal Dither
■
Optional Data Output Randomizer
■
LVDS or CMOS Outputs
■
Single 3.3V Supply
■
Power Dissipation: 1.19W
■
Clock Duty Cycle Stabilizer
■
Pin Compatible with LTC2208
■
64-Pin (9mm × 9mm) QFN Package
, LT, LTC and LTM are registered trademarks of Linear Technology Corporation.
All other trademarks are the property of their respective owners. Patents Pending.
64k Point FFT,
FIN = 4.9MHz, –1dBFS
–
+
S/H
AMP
CORRECTION
LOGIC AND
SHIFT REGISTER
OUTPUT
DRIVERS
16-BIT
PIPELINED
ADC CORE
INTERNAL ADC
REFERENCE
GENERATOR
1.575V
COMMON MODE
BIAS VOLTAGE
CLOCK/DUTY
CYCLE
CONTROL
D15
D0
SHDN
DITH
MODE
LVDS
RAND
VCM
ANALOG
INPUT
2217 TA01
CMOS
OR
LVDS
0.5V TO 3.6V
3.3V
SENSE
OGND
OVDD
2.2
μF
1
μF
1
μF
1
μF
1
μF
VDD
GND
ADC CONTROL INPUTS
AIN+
ENC +
AIN–
ENC –
OF
CLKOUT
FEATURES
DESCRIPTION
相關PDF資料 |
PDF描述 |
|---|---|
| LTC2217IUP#TR | 1-CH 16-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS, PQCC64 |
| LTC2217CUP | 1-CH 16-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS, PQCC64 |
| LTC2217CUP#TR | 1-CH 16-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS, PQCC64 |
| LTC2226HLU#PBF | 1-CH 12-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS, PQFP32 |
| LTC2226HLU | 1-CH 12-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS, PQFP32 |
相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| LTC2217IUP#PBF | 制造商:Linear Technology 功能描述:IC ADC 16BIT 105MSPS LN 64-QFN 制造商:Linear Technology 功能描述:16BIT ADC 105MSPS L NOISE 64QFN 制造商:Linear Technology 功能描述:16BIT ADC, 105MSPS, L NOISE, 64QFN |
| LTC2217IUP#TRPBF | 制造商:Linear Technology 功能描述:IC ADC 16BIT 105MSPS LN 64-QFN |
| LTC2217IUP-PBF | 制造商:LINER 制造商全稱:Linear Technology 功能描述:16-Bit, 105Msps Low Noise ADC |
| LTC2217IUP-TR | 制造商:LINER 制造商全稱:Linear Technology 功能描述:16-Bit, 105Msps Low Noise ADC |
| LTC2217IUP-TRPBF | 制造商:LINER 制造商全稱:Linear Technology 功能描述:16-Bit, 105Msps Low Noise ADC |
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