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參數(shù)資料
| 型號： | LTC2207UK-14 |
| 廠商： | LINEAR TECHNOLOGY CORP |
| 元件分類： | ADC |
| 英文描述： | 14-Bit, 105Msps/80Msps ADCs |
| 中文描述： | PROPRIETARY METHOD ADC, PQCC48 |
| 封裝： | 7 X 7 MM, PLASTIC, MO-220WKKD-2, QFN-48 |
| 文件頁數(shù)： | 23/32頁 |
| 文件大?。?/td> | 1298K |
| 代理商： | LTC2207UK-14 |
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LTC2207-14/LTC2206-14
23
220714614fa
The output should be buffered with a device such as a
ALVCH16373 CMOS latch. For full speed operation the
capacitive load should be kept under 10pF. A resistor in
series with the output may be used but is not required since
the output buffer has a series resistor of 33
Ω
on chip.
Lower OV
DD
voltages will also help reduce interference
from the digital outputs.
Data Format
The LTC2207-14/LTC2206-14 parallel digital output can
be selected for offset binary or 2’s complement format.
The format is selected with the MODE pin. This pin has a
four level logic input, centered at 0, 1/3V
DD
, 2/3V
DD
and
V
DD
. An external resistor divider can be used to set the
1/3V
DD
and 2/3V
DD
logic levels. Table 1 shows the logic
states for the MODE pin.
Table 1. MODE Pin Function
MODE
0(GND)
1/3V
DD
2/3V
DD
V
DD
Output Format
Offset Binary
Offset Binary
2’s Complement
2’s Complement
Clock Duty Cycle Stabilizer
Off
On
On
Off
Overflow Bit
An overflow output bit (OF) indicates when the converter
is over-ranged or under-ranged. A logic high on the OF
pin indicates an overflow or underflow.
Output Clock
The ADC has a delayed version of the encode input available
as a digital output. Both a noninverted version, CLKOUT+
and an inverted version CLKOUT– are provided. The
CLKOUT+/CLKOUT– can be used to synchronize the con-
verter data to the digital system. This is necessary when
using a sinusoidal encode. Data can be latched on the
rising edge of CLKOUT+ or the falling edge of CLKOUT–.
CLKOUT+ falls and CLKOUT– rises as the data outputs
are updated.
Digital Output Randomizer
Interference from the ADC digital outputs is sometimes
unavoidable. Interference from the digital outputs may be
from capacitive or inductive coupling or coupling through
the ground plane. Even a tiny coupling factor can result in
discernible unwanted tones in the ADC output spectrum.
By randomizing the digital output before it is transmitted
off chip, these unwanted tones can be randomized, trading
a slight increase in the noise floor for a large reduction in
unwanted tone amplitude.
The digital output is “Randomized” by applying an exclu-
sive-OR logic operation between the LSB and all other data
output bits. To decode, the reverse operation is applied;
that is, an exclusive-OR operation is applied between the
LSB and all other bits. The LSB, OF and CLKOUT outputs
are not affected. The output Randomizer function is active
when the RAND pin is high.
Figure 12. Functional Equivalent of Digital Output Randomizer
CLKOUT
+
OF
D13/D0
D12/D0
D2/D0
D1/D0
D0
D1
RAND = HIGH,
SCRAMBLE
ENABLED
D2
D12
D13
OF
LTC2207-14/LTC2206-14
CLKOUT
RAND
22076 F12
APPLICATIONS INFORMATION
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| LTC2206UK | 16-Bit, 105Msps/80Msps ADCs |
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相關代理商/技術參數(shù) |
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|---|---|
| LTC2208 | 制造商:LINER 制造商全稱:Linear Technology 功能描述:Dual 14-Bit 250Msps |
| LTC2208-14 | 制造商:LINER 制造商全稱:Linear Technology 功能描述:14-Bit, 130Msps ADC |
| LTC2208CUP | 制造商:Linear Technology 功能描述:IC ADC 16BIT 130MSPS 64-QFN |
| LTC2208CUP#PBF | 制造商:Linear Technology 功能描述:Single ADC Pipelined 130Msps 16-bit Parallel/LVDS 64-Pin QFN EP Cut Tape 制造商:Linear Technology 功能描述:IC ADC 16BIT 130MSPS 64-QFN 制造商:Linear Technology 功能描述:ADC 16BIT 3.3VIN 130MSPS 64QFN 制造商:Linear Technology 功能描述:ADC, 16BIT, 3.3VIN, 130MSPS, 64QFN 制造商:Linear Technology 功能描述:MS-ADC/High Speed, 16-bit, 130Msps ADC 制造商:Linear Technology 功能描述:IC, ADC, 16BIT, 130MSPS, QFN-64, Resolution (Bits):16bit, Sampling Rate:130MSPS, Supply Voltage Type:Single, Supply Voltage Min:3.135V, Supply Voltage Max:3.465V, Supply Current:380mA, Digital IC Case Style:QFN, No. of Pins:64 , RoHS Compliant: Yes |
| LTC2208CUP#PBF | 制造商:Linear Technology 功能描述:IC ADC 16BIT 130MSPS QFN-64 |
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