- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄8895 > LTC1666CG#PBF (Linear Technology)IC D/A CONV 12BIT 50MSPS 28-SSOP PDF資料下載
參數(shù)資料
| 型號(hào)： | LTC1666CG#PBF |
| 廠商： | Linear Technology |
| 文件頁數(shù)： | 7/24頁 |
| 文件大小： | 0K |
| 描述： | IC D/A CONV 12BIT 50MSPS 28-SSOP |
| 標(biāo)準(zhǔn)包裝： | 47 |
| 設(shè)置時(shí)間： | 20ns |
| 位數(shù)： | 12 |
| 數(shù)據(jù)接口： | 并聯(lián) |
| 轉(zhuǎn)換器數(shù)目： | 1 |
| 電壓電源： | 雙 ± |
| 功率耗散（最大）： | 180mW |
| 工作溫度： | 0°C ~ 70°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 28-SSOP（0.209"，5.30mm 寬） |
| 供應(yīng)商設(shè)備封裝： | 28-SSOP |
| 包裝： | 管件 |
| 輸出數(shù)目和類型： | 2 電流，單極 |
| 采樣率（每秒）： | 50M |
| 產(chǎn)品目錄頁面： | 1352 (CN2011-ZH PDF) |
15
LTC1666/LTC1667/LTC1668
APPLICATIO S I FOR ATIO
WU
UU
Resistor Loaded Outputs
A differential resistor loaded output configuration is shown
in Figure 6. It is simple and economical, but it can drive
only differential loads with impedance levels and ampli-
tudes appropriate for the DAC outputs.
The recommended single-ended resistor loaded configu-
ration is essentially the same circuit as the differential
resistor loaded, case—simply use the IOUT A output,
referred to ground. Rather than tying the unused IOUT B
output to ground, it is preferred to load it with the equiva-
lent RLOAD of IOUT A. Then IOUT B will still swing with a
waveform complementary to IOUT A.
helps reduce distortion by limiting the high frequency
signal amplitude at the op amp inputs. The circuit swings
±1V around ground.
Figure 8 shows a simplified circuit for a single-ended
output using I-to-V converter to produce a unipolar
buffered voltage output. This configuration typically has
the best DC linearity performance, but its AC distortion at
higher frequencies is limited by U1’s slewing capabilities.
Digital Interface
The LTC1666/LTC1667/LTC1668 have parallel inputs that
are latched on the rising edge of the clock input. They
accept CMOS levels from either 5V or 3.3V logic and can
accept clock rates of up to 50MHz.
Referring to the Timing Diagram and Block Diagram, the
data inputs go to master-slave latches that update on the
rising edge of the clock. The input logic thresholds, VIH =
2.4V min, VIL = 0.8V max, work with 3.3V or 5V CMOS
levels over temperature. The guaranteed setup time, tDS,
is 8ns minimum and the hold time, tDH, is 4ns minimum.
The minimum clock high and low times are guaranteed at
6ns and 8ns, respectively. These specifications allow the
LTC1666/LTC1667/LTC1668 to be clocked at up to 50Msps
minimum.
For best AC performance, the data and clock waveforms
need to be clean and free of undershoot and overshoot.
Clock and data interconnect lines should be twisted pair,
coax or microstrip, and proper line termination is impor-
tant. If the digital input signals to the DAC are considered
as analog AC voltage signals, they are rich in spectral
components over a broad frequency range, usually in-
Op Amp I to V Converter Outputs
Adding an op amp differential to single-ended converter
circuit to the differential resistor loaded output gives the
circuit of Figure 7.
This circuit complements the capabilities of the trans-
former-coupled application at lower frequencies, since
available op amps can deliver good AC distortion perfor-
mance at signal frequencies of a few MHz down to DC. The
optional capacitor adds a single real pole of filtering, and
Figure 6. Differential Resistor-Loaded Output
IOUT B
IOUT A
52.3
52.3
1666/7/8 F07
LTC1666/
LTC1667/
LTC1668
Figure 8. Single-Ended Op Amp I to V Converter
200
1666/7/8 F09
IOUT A
IOUT B
LADCOM
RFB
200
VOUT
0V TO 2V
IOUTFS
10mA
COUT
–
+
U1
LT
1812
LTC1666/
LTC1667/
LTC1668
IOUT B
IOUT A
52.3
500
52.3
1666/7/8 F08
–
+
200
500
200
60pF
LT1809
±1V
10dBm
VOUT
LTC1666/
LTC1667/
LTC1668
Figure 7. Differential to Single-Ended Op Amp I-V Converter
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| MS27474T12B3PLC | CONN HSG RCPT 3POS JAM NUT PINS |
| MS27473E14A18SLC | CONN HSG PLUG 18POS STRGHT SCKT |
| VI-214-MW-F2 | CONVERTER MOD DC/DC 48V 100W |
| VI-214-MW-F1 | CONVERTER MOD DC/DC 48V 100W |
| MS27473T20A16PLC | CONN HSG PLUG 16POS STRGHT PINS |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| LTC1666IG | 功能描述:IC D/A CONV 12BIT 50MSPS 28-SSOP RoHS:否 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 數(shù)模轉(zhuǎn)換器 系列:- 標(biāo)準(zhǔn)包裝:47 系列:- 設(shè)置時(shí)間:2µs 位數(shù):14 數(shù)據(jù)接口:并聯(lián) 轉(zhuǎn)換器數(shù)目:1 電壓電源:單電源 功率耗散（最大）:55µW 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:28-SSOP（0.209"，5.30mm 寬） 供應(yīng)商設(shè)備封裝:28-SSOP 包裝:管件 輸出數(shù)目和類型:1 電流，單極；1 電流，雙極 采樣率（每秒）:* |
| LTC1666IG#PBF | 功能描述:IC D/A CONV 12BIT 50MSPS 28-SSOP RoHS:是 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 數(shù)模轉(zhuǎn)換器 系列:- 標(biāo)準(zhǔn)包裝:47 系列:- 設(shè)置時(shí)間:2µs 位數(shù):14 數(shù)據(jù)接口:并聯(lián) 轉(zhuǎn)換器數(shù)目:1 電壓電源:單電源 功率耗散（最大）:55µW 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:28-SSOP（0.209"，5.30mm 寬） 供應(yīng)商設(shè)備封裝:28-SSOP 包裝:管件 輸出數(shù)目和類型:1 電流，單極；1 電流，雙極 采樣率（每秒）:* |
| LTC1666IG#TR | 功能描述:IC D/A CONV 12BIT 50MSPS 28-SSOP RoHS:否 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 數(shù)模轉(zhuǎn)換器 系列:- 標(biāo)準(zhǔn)包裝:47 系列:- 設(shè)置時(shí)間:2µs 位數(shù):14 數(shù)據(jù)接口:并聯(lián) 轉(zhuǎn)換器數(shù)目:1 電壓電源:單電源 功率耗散（最大）:55µW 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:28-SSOP（0.209"，5.30mm 寬） 供應(yīng)商設(shè)備封裝:28-SSOP 包裝:管件 輸出數(shù)目和類型:1 電流，單極；1 電流，雙極 采樣率（每秒）:* |
| LTC1666IG#TRPBF | 功能描述:IC D/A CONV 12BIT 50MSPS 28-SSOP RoHS:是 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 數(shù)模轉(zhuǎn)換器 系列:- 標(biāo)準(zhǔn)包裝:47 系列:- 設(shè)置時(shí)間:2µs 位數(shù):14 數(shù)據(jù)接口:并聯(lián) 轉(zhuǎn)換器數(shù)目:1 電壓電源:單電源 功率耗散（最大）:55µW 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:28-SSOP（0.209"，5.30mm 寬） 供應(yīng)商設(shè)備封裝:28-SSOP 包裝:管件 輸出數(shù)目和類型:1 電流，單極；1 電流，雙極 采樣率（每秒）:* |
| LTC1667CG | 功能描述:IC D/A CONV 14BIT 50MSPS 28-SSOP RoHS:否 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 數(shù)模轉(zhuǎn)換器 系列:- 產(chǎn)品培訓(xùn)模塊:Data Converter Fundamentals DAC Architectures 標(biāo)準(zhǔn)包裝:750 系列:- 設(shè)置時(shí)間:7µs 位數(shù):16 數(shù)據(jù)接口:并聯(lián) 轉(zhuǎn)換器數(shù)目:1 電壓電源:雙 ± 功率耗散（最大）:100mW 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:28-LCC（J 形引線） 供應(yīng)商設(shè)備封裝:28-PLCC（11.51x11.51） 包裝:帶卷 (TR) 輸出數(shù)目和類型:1 電壓，單極；1 電壓，雙極 采樣率（每秒）:143k |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。